HDLA-2416 datasheet(13/18 Pages) BOARDCOM

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Broadcom

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HDLx-2416 Series

Data Sheet

Display Clear

Data stored in the Character RAM, Control Register, and

Attribute RAM will be cleared if the clear (CLR) is held low for a

minimum of 10 μs. Note that the display will be cleared

regardless of the state of the chip enables (CE1, CE2). After the

display is cleared, the ASCII code for a space (20hex) is loaded

into all character RAM locations and 00hex is loaded into all

Attribute RAM/Control Register memory locations.

Data Entry

Figure 2 shows a truth table for the HDLX-2416 display. Setting

the chip enables (CE1, CE2) to logic 0 and the cursor select (CU)

to logic 1 will enable ASCII data loading. When cursor select

(CU) is set to logic 0, data will be loaded into the Control

select the digit location in the display. Data inputs D0–D6 are

used to load information into the display. Data will be latched

into the display on the rising edge of the WR signal. D0–D6, A0–

A1, CE1, CE2, and CU must be held stable during the write cycle

to ensure that correct data is stored into the display. Data can

be loaded into the display in any order. Note that when A0 and

A1 are logic 0, data is stored in the right most display location.

Cursor

When cursor enable (CUE) is a logic 1, a cursor will be displayed

in all digit locations where a logic 1 has been stored in the Digit

Cursor memory in the Attribute RAM. The cursor consists of all

35 dots ON at half brightness. A flashing cursor can be

displayed by pulsing CUE. When CUE is a logic 0, the ASCII data

stored in the Character RAM will be displayed regardless of the

Digit Cursor bits.

Blanking

Blanking of the display is controlled through the BL input, the

Control Register and Attribute RAM. The user can achieve a

variety of functions by using these controls in different

combinations, such as full hardware display blank, software

blank, blanking of individual characters, and synchronized

flashing of individual characters or entire display (by strobing

the blank input). All of these blanking modes affect only the

output drivers, maintaining the contents and write capability

of the internal RAMs and Control Register, so that normal

loading of RAMs and Control Register can take place even with

the display blanked.

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