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ZL2103ALAF Datenblatt(PDF) 21 Page - Renesas Technology Corp

Teilenummer ZL2103ALAF
Bauteilbeschribung  3A Digital-DC Synchronous Step-Down DC/DC Converter
PDF  28 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZL2103ALAF Datenblatt(HTML) 21 Page - Renesas Technology Corp

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FN6966 Rev 5.00
Page 21 of 28
May 3, 2011
ZL2103
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries. This product is subject to a license from Power One, Inc. related to digital power
technology as set forth in U.S. Patent No. 7,000,125 and other related patents owned by Power One, Inc. These license rights do not extend to stand-alone POL
regulators unless a royalty is paid to Power One, Inc.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
© Copyright Intersil Americas LLC 2009-2011. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
for details on how to select specific overvoltage fault response
options via I2C/SMBus.
Output Pre-Bias Protection
An output pre-bias condition exists when an externally applied
voltage is present on a power supply’s output before the power
supply’s control IC is enabled. Certain applications require that
the converter not be allowed to sink current during start up if a
pre-bias condition exists at the output. The ZL2103 provides pre-
bias protection by sampling the output voltage prior to initiating
an output ramp.
If a pre-bias voltage lower than the target voltage exists after the
pre-configured delay period has expired, the target voltage is set
to match the existing pre-bias voltage and both drivers are
enabled. The output voltage is then ramped to the final
regulation value at the ramp rate set by the SS pin.
The actual time the output will take to ramp from the pre-bias
voltage to the target voltage will vary depending on the pre-bias
voltage but the total time elapsed from when the delay period
expires and when the output reaches its target value will match
the pre-configured ramp time (see Figure 17).
If a pre-bias voltage higher than the target voltage exists after the
pre-configured delay period has expired, the target voltage is set
to match the existing pre-bias voltage and both drivers are
enabled with a PWM duty cycle that would ideally create the pre-
bias voltage.
Once the pre-configured soft-start ramp period has expired, the
PG pin will be asserted (assuming the pre-bias voltage is not
higher than the overvoltage limit). The PWM will then adjust its
duty cycle to match the original target voltage and the output will
ramp down to the pre-configured output voltage.
If a pre-bias voltage higher than the overvoltage limit exists, the
device will not initiate a turn-on sequence and will declare an
overvoltage fault condition to exist. In this case, the device will
respond based on the output overvoltage fault response method
that has been selected. See “Output Overvoltage Protection” on
page 20 for response options due to an overvoltage condition.
FIGURE 17. OUTPUT RESPONSES TO PRE-BIAS VOLTAGES



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