Sunplus Technology Co., Ltd.

Rev.: 1.0

1999.11.04

SPC500A1

2

FUNCTION DESCRIPTIONS

CPU

The 8-bit microprocessor of SPC500A1 is a high performance processor equipped with Accumulator, Program

Counter, X Register, Stack pointer and Processor Status Register (this is the same as the 6502 instruction

structure).

SPC500A1 is able to perform with 8.0MHz (max.) depending on the application specifications.

OSCILLATOR

The SPC500A1 supports AT-cut parallel resonant oscillated Crystal / Resonator or RC Oscillator or external

clock sources by mask option (select one from those three types).

The design of application circuit should

follow the vendors’ specifications or recommendations.

The diagrams listed below are typical X’TAL/ROSC

circuits for most applications:

(a) Crystal or

Ceramic Resonator

Connections

20 pf

20 pf

Rosc

(b) RC Oscillator

Connections

VDD

SPC500A1

XI/R

XO

SPC500A1

XI/R

XO

MASK OPTION

The SPC500A1 has the following mask option:

Supports Crystal Resonator or Rosc (with mask option).

ROM AREA

The SPC500A1 provides a 512K-byte ROM that can be defined as the program area, audio data area, or both.

To access ROM, users should program the BANK SELECT Register, choose bank, and access address to fetch

data.

RAM AREA

The SPC500A1 total RAM consists of 128 bytes (including Stack) at locations from $80 through $FF.

VOLUME CONTROL FUNCTION

The SPC500A1 contains a volume control function that provides an 8-step volume controller to control current

D/A output.

A volume control function selector (Enable/Disable) register and controller register is provided.