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PEX9749 Datenblatt(PDF) 2 Page - Broadcom Corporation. |
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PEX9749 Datenblatt(HTML) 2 Page - Broadcom Corporation. |
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2 / 3 page ![]() PEX9700 Series Switch Chips Downstream Port Con- tainment (DPC/eDPC) Most servers have difficulty handling serious errors, especially when a PCIe end-point disappears from the system. DPC/eDPC allows a downstream link to be disabled after an uncorrectable error, making recovery possible in a controlled and robust manner. Flexible Topologies PEX9700 switches eliminate the topology restrictions of PCIe. The switch allows other topologies such as mesh, I/O Expansion Box with Multiple Hosts, and many others. And it does this while allowing the components to remain architecturally and software compatible with standard PCIe. Improved SSC Isolation The switches offer several mechanisms for supporting multi- clock domains that include spread spectrum clocking; eliminating the need to pass a common clock across a backplane. In addition to the standard Avago approach to the problem, a new PCI-SIG approach called SRIS (Separate Refclk Independent SSC Architecture) is now available. Applications Products based on ExpressFabric technology can help deliver an outstanding solution for designing a heterogeneous system with a requirement for a flexible mix of processors, storage elements, and communication devices. HPC Clusters HPC clusters are made up of high- performance processing elements that communicate through high bandwidth, low latency pathways in order to execute applications such as medical imaging, financial trading, data warehousing, etc. PEX9700 switches can be used in switch fabric applications for HPC clustering. The processing subsystems can be connected to the PCIe fabric while running the same application software. PCIe switch based clustering eliminates expensive protocol bridging devices resulting in lower cost and power. And clustering systems can be built with I/O sharing as an additional native capability when needed. Software Development Kit (SDK) The SDK for the PEX9700 series includes drivers, source code and GUI interfaces to aid in configuring and debugging. Both the performancePAK™ and visionPAK™ are exclusive to Avago and are supported by its RDK and SDK, which are the industry’s most advanced hardware-and software development kits. performancePAK The performancePAK is a suite of unique and innovative performance features that allows Avago Gen 3 switches to be the highest performing switches in the market today. visionPAK The visionPAK is a debug diagnostics suite of integrated hardware and software instruments that allows users to help bring their systems to market faster. Key Advantages (Continued) Product Brief − x4, x8, or x16, depending on Port configuration; x4 can down-train to x1 and x2 width − Configurable through serial EEPROM, I2C, SMBus, and/or Host port • Standards Compliant − PCI Express Base Specification, r3.1 (backward compatible w/ PCIe r2.0, & r1.0a/1.1) − PCI Power Management Spec, r1.2 • High Performance − Full line rate on all ports • Cut-Thru packet latency of less than 150ns (x16 to x16) − 2KB Max Payload Size − Multicast through DMA • Quality of Service (QoS) − 8 Traffic Classes (TC) supported • Reliability, Availability, Serviceability − visionPAK − performance PAK − DPC/eDPC Support − Read Tracking for surprise removal − All ports Hot-Plug capable thru I2C –SSC isolation on all ports − SRIS support − ECRC and Poison bit support − Port Status bits and GPIO available |
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