PEX 8603, PCI Express Gen 2 Switch, 3 Lanes, 3 Ports

© PLX Technology, www.plxtech.com

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8/17/2011, Version 1.1

example where the PEX8603 is configured as x2, x1. In this

example, the x2 link is running at the lower data rate (2.5GT/s)

while a single x1 port is running at the higher data rate (5.0

GT/s). In this usage model, the PEX8603 acts as a bridge

between Gen 1 and Gen 2 devices allowing the faster device to

operate at its full bandwidth capabilities.

Figure 5. Gen 1 to Gen 2 Bandwidth Bridge

Software Usage Model

From a system model viewpoint, each PCI Express port is a

virtual PCI to PCI bridge device and has its own set of PCI

Express configuration registers. It is through the upstream port

that the BIOS or host can configure the other ports using

standard PCI enumeration. The virtual PCI-to-PCI bridges

within the PEX8603 are compliant to the PCI and PCI Express

system models. The Configuration Space Registers (CSRs) in a

virtual primary/secondary PCI-to-PCI bridge are accessible by

type 0 configuration cycles through the virtual primary bus

interface (matching bus number, device number, and function

number).

Interrupt Sources/Events

The PEX8603 supports the INTx interrupt message type

(compatible with PCI 2.3 Interrupt signals) or Message Signaled

Interrupts (MSI) when enabled. Interrupts/messages are

generated by PEX8603 for Hot-Plug events, doorbell interrupts,

baseline error reporting, and advanced error reporting.

Development Tools

PLX offers hardware and software tools to enable rapid

customer design activity. These tools consist of a hardware

module (PEX8603 RDK), hardware documentation

(available at www.plxtech.com), and a Software Development

Kit (also available at www.plxtech.com).

ExpressLane PEX8603 RDK

The PEX8603 RDK is a hardware module containing the

PEX8603 which plugs right into your system. The PEX8603

RDK can be used to test and validate customer software, or used

as an evaluation vehicle for PEX8603 features and benefits. The

PEX8603 RDK provides everything that a user needs to get their

hardware and software development started.

Figure 6. PEX8603 Rapid Development Kit

Software Development Kit (SDK)

PLX’s Software Development Kit is available for download at

www.plxtech.com/sdk. The software development kit includes

drivers, source code, and GUI interfaces to aid in configuring

and debugging the PEX8603.

Both performancePAK and visionPAK are supported by PLX’s

RDK and SDK, the industry’s most advanced hardware- and

software-development kits.

Product Ordering Information

Part Number

Description

PEX8603-AA50NI G

3 Lane, 3 Port PCI Express Gen 2.0

Switch, Pb-Free (10x10mm

2

PEX8603-AA RDK

aQFN)

PEX 8603 Rapid Development Kit +

CM108 (one x1 upstream port, two x1

downstream ports)

PEX 8603-AA-2U1D

RDK

PEX 8603 Rapid Development Kit +

CM107 (one x2 upstream port, one x1

downstream port)

PLX Technology, Inc. All rights reserved. PLX, the PLX logo, ExpressLane,

Read Pacing, Dual Cast, performancePAK and visionPAK are trademarks of

PLX Technology, Inc. All other product names that appear in this material are

for identification purposes only and are acknowledged to be trademarks or

registered trademarks of their respective companies. Information supplied by

PLX is believed to be accurate and reliable, but PLX assumes no responsibility

for any errors that may appear in this material. PLX reserves the right, without

notice, to make changes in product design or specification.

Visit www.plxtech.com for more information.

PEX8518

EEPROM

DIP switch

for cfg.

JTAG

Header

RefClk

x4

PERST#

PORT 2 - X4

Manual

Reset

(Upstream Port)

Lane Status

LEDs

PORT 1 - X4

Reset

Ckt.

I2C

PEX

8518

PEX 8603