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10/20/2010, Version 1.0

PEX 8712, PCI Express Gen 3 Switch, 12 Lanes, 3 Ports

Figure 2. Multi-Host

Port Configuration

PEX 8712

x4

x4

x4

The PEX 8712 can also be configured in Multi-Host mode.

In Multi-Host mode, a virtual switch is created for each

host port and its associated

downstream ports inside the device.

The traffic between the ports of a

virtual switch is completely isolated

from the traffic in other virtual

switches. With the PEX 8712 in

Multi-Host mode, users can choose

two ports as host/upstream ports and

assign the remaining downstream

port to the desired host. In this

scenario, one of the hosts will serve

as a failover port which will not have a downstream port of

its own. If the primary host were to fail, the secondary host

would then take over this downstream port (see Figure 2).

The PEX 8712 also provides several ways to configure its

registers. The device can be configured through strapping

pins, I

EEPROM. This allows for easy debug during the

development phase, performance monitoring during the

operation phase, and driver or software upgrade.

Dual-Host & Failover Support

In Single-Host mode, the PEX 8712 supports a Non-

Transparent (NT) Port, which enables the

implementation of dual-host systems for redundancy and

host failover

capability. The NT

port allows systems

to isolate host

memory domains b

presenting the

processor s

as an endpoint

rather than another

memory system.

Base address

registers are used to

translate addresse

doorbell registers

are used to send interrupts between the address domains;

and scratchpad registers (accessible by both CPUs) allo

inter-processor communication (see Figure 3).

y

ubsystem

s;

w

ulti-Host & Failover Support

onfigured with

+1

al door-

m

o

s

M

In Multi-Host mode, PEX 8712 can be c

two upstream host ports, each with its own dedicated

downstream ports. The device can be configured for 1

redundancy. The PEX 8712 allows the hosts to

communicate their status to each other via speci

bell registers. In failover mode, if a host fails, the host

designated for failover will disable the upstream port

attached to the failing host and program the downstrea

ports of that host to its own domain. Figure 4a shows a tw

host system in Multi-Host mode with two virtual switches

inside the device and Figure 4b shows Host 1 disabled

after failure and Host 2 having taken over all of Host 1’

end-points.

PEX 8712

PEX 8712

Figure 4a. Multi-Host

Host 1

Host 2

End

Point

Figure 4b. Multi-Host Fail-Over

Host 1

Host 2

End

Point

ot Plug for High Availability

ace hardware

down

d Hot Plug

PCI

erDes Power and Signal Management

s fully

-back

m.

teroperability

igned to be fully compliant with the

H

Hot plug capability allows users to repl

modules and perform maintenance without powering

the system. The PEX 8712 hot plug capability feature

makes it suitable for High Availability (HA)

applications. All three ports include a Standar

Controller. If the PEX 8712 is used in an application

where one or more of its downstream ports connect to

Express slots, each port’s Hot Plug Controller can be used

to manage the hot-plug event of its associated slot. Every

port on the PEX 8712 is equipped with a hot-plug

control/status register to support hot-plug capability

through external logic via the I

S

The PEX 8712 provides low power capability that i

compliant with the PCIe power management specification

and supports software control of the SerDes outputs to

allow optimization of power and signal strength in a

system. Furthermore, the SerDes block supports loop

modes and advanced reporting of error conditions,

which enables efficient management of the entire syste

In

The PEX 8712 is des

PCI Express Base Specification r2.0, and is backwards

compatible to PCI Express Base Specification r1.1 and

r1.0a. Additionally, it supports auto-negotiation, lane

reversal, and polarity reversal. Furthermore, the PEX

8712 is tested for Microsoft Vista compliance. All PLX

End

Point

CPU

Primary Host

Root

Complex

PEX 8712

NT

CPU

Secondary Host

Non-Transparent

Port

Figure 3. Non-Transparent Port