PI74FCT16543/162543/162H543T

16-BIT LATCHED TRANSCEIVERS

2

PS2038B

01/10/01

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

25

26

27

28

32

31

30

29

1

OEAB

1

LEAB

1

CEAB

GND

1

1

VCC

1

1

1

GND

1

1

1

2

2

2

GND

2

2

2

2

2

GND

2

CEAB

2

LEAB

2

OEAB

1

OEBA

1

LEBA

1

CEBA

GND

1

1

VCC

1

1

1

GND

1

1

1

2

2

2

GND

2

2

2

2

2

GND

2

CEBA

2

LEBA

2

OEBA

Product Pin Description

Pin Name

Description

xOEAB

A-to-B Output Enable Input (Active LOW)

xOEBA

B-to-A Output Enable Input (Active LOW)

xCEAB

A-to-B Enable Input (Active LOW)

xCEBA

B-to-A Enable Input (Active LOW)

xLEAB

A-to-B Latch Enable Input (Active LOW)

xLEBA

B-to-A Latch Enable Input (Active LOW)

xAx

xBx

GND

Ground

Power

Latch

Output

Inputs

Status

Buffers

X

CEAB

X

H

X

X

Storing

High Z

X

H

X

Storing

X

X

X

H

X

High Z

L

L

L

Transparent

Current A Inputs

L

H

L

Storing

Previous* A Inputs

Truth Table

(1)

Notes:

1.

*Before xLEAB LOW-to-HIGH Transistion

H = High Voltage Level

L = Low Voltage Level

X = Don’t Care or Irrelevant

Z = High Impedance

2.

A-to-B data flow shown. B-to-A flow control is the same,

except using xCEBA, xLEBA, and xOEBA.

Note: 1. For the PI74FCT162H543T, these pins have “Bus

Hold.” All other pins are standard, outputs, or I/Os.

Product Pin Configuration

56-PIN

V56

A56