LVCMOS/LVTTL-TO-DIFFERENTIAL

3.3V, 2.5V LVPECL TRANSLATOR

85320 DATA SHEET

4

REVISION B 12/19/14

CC

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

f

MAX

Output Frequency

215

MHz

t

PD

Propagation Delay; NOTE 1

ƒ ≤ 267MHz

0.8

1.7

ns

tjit

Buffer Additive Phase Jitter, RMS;

refer to Additive Phase Jitter Section

Integration Range:

12KHz - 20MHz

0.05

ps

tsk(pp)

Part-to-Part Skew; NOTE 2, 3

375

ps

t

R

, t

F

Output Rise/Fall Time

20% to 80%

200

700

ps

odc

Output Duty Cycle

45

55

%

NOTE 1: Measured from V

CC

/2 point of the input to the differential output crossing point.

NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load

conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.

CC

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

f

MAX

Output Frequency

267

MHz

t

PD

Propagation Delay; NOTE 1

ƒ ≤ 267MHz

0.8

1.4

ns

tjit

Buffer Additive Phase Jitter, RMS;

refer to Additive Phase Jitter Section

Integration Range:

12KHz - 20MHz

0.05

ps

tsk(pp)

Part-to-Part Skew; NOTE 2, 3

275

ps

t

R

, t

F

Output Rise/Fall Time

20% to 80%

200

700

ps

odc

Output Duty Cycle

45

55

%

NOTE 1: Measured from V

CC

/2 point of the input to the differential output crossing point.

NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load

conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.