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V62/13624-01XE-R Datenblatt(PDF) 14 Page - Texas Instruments

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Teilenummer V62/13624-01XE-R
Bauteilbeschribung  Mixed Signal Microcontroller
PDF  77 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

V62/13624-01XE-R Datenblatt(HTML) 14 Page - Texas Instruments

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MSP430F2132-EP
SLAS913A – JULY 2013 – REVISED AUGUST 2013
www.ti.com
Product Folder Links: MSP430F2132-EP
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
4.17 Timer0_A3
Timer0_A3 is a 16-bit timer/counter with three capture/compare registers. Timer0_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer0_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Table 12. Timer0_A3 Signal Connections
INPUT PIN NUMBER
DEVICE INPUT
SIGNAL
MODULE
INPUT NAME
MODULE
BLOCK
MODULE
OUTPUT
SIGNAL
OUTPUT PIN NUMBER
PW
RHB, RTV
PW
RHB, RTV
21 - P1.0
21 - P1.0
TACLK
TACLK
Timer
NA
ACLK
ACLK
SMCLK
SMCLK
9 - P2.1
7 - P2.1
TAINCLK
INCLK
22 - P1.1
22 - P1.1
TA0
CCI0A
CCR0
TA0
22 - P1.1
22 - P1.1
10 - P2.2
8 - P2.2
TA0
CCI0B
26 - P1.5
26 - P1.5
DVSS
GND
10 - P2.2
8 - P2.2
DVCC
VCC
ADC10
(internal)
ADC10
(internal)
23 - P1.2
23 - P1.2
TA1
CCI1A
CCR1
TA1
23 - P1.2
23 - P1.2
CAOUT
(internal)
CCI1B
27 - P1.6
27 - P1.6
DVSS
GND
19 - P2.3
18 - P2.3
DVCC
VCC
ADC10
(internal)
ADC10
(internal)
24 - P1.3
24 - P1.3
TA2
CCI2A
CCR2
TA2
24 - P1.3
24 - P1.3
ACLK (internal)
CCI2B
28 - P1.7
28 - P1.7
DVSS
GND
20 - P2.4
19 - P2.4
DVCC
VCC
ADC10
(internal)
ADC10
(internal)



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