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inductor and diode. When the output is shorted, the DC

current of the inductor and diode can approach the current

limit threshold. Therefore, reducing the current limit by 40%

can result in an equal percentage drop of the inductor and

diode current. The short circuit waveforms are captured in

Figure 9, and the benefit of the foldback frequency and

current limit is self–evident.

Figure 9. In Short Circuit, the Foldback Current and

Foldback Frequency Limit the Switching Current to

Protect the IC, Inductor and Catch Diode

Thermal Considerations

A calculation of the power dissipation of the IC is always

necessary prior to the adoption of the regulator. The current

drawn by the IC includes quiescent current, pre–driver

current, and power switch base current. The quiescent

current drives the low power circuits in the IC, which

include comparators, error amplifier and other logic blocks.

Therefore, this current is independent of the switching

current and generates power equal to

WQ + VIN

where:

IQ = quiescent current.

The pre–driver current is used to turn on/off the power

switch and is approximately equal to 12 mA in worst case.

During steady state operation, the IC draws this current from

the Boost pin when the power switch is on and then receives

it from the VIN pin when the switch is off. The pre–driver

current always returns to the VSW pin. Since the pre–driver

current goes out to the regulator’s output even when the

power switch is turned off, a minimum load is required to

prevent overvoltage in light load conditions. If the Boost pin

voltage is equal to VIN + VO when the switch is on, the power

dissipation due to pre–driver current can be calculated by

WDRV + 12 mA

(VIN * VO )

VO2

VIN

)

The base current of a bipolar transistor is equal to collector

current divided by beta of the device. Beta of 60 is used here

to estimate the base current. The Boost pin provides the base

current when the transistor needs to be on. The power

dissipated by the IC due to this current is

WBASE +

VO2

VIN

where:

IS = DC switching current.

When the power switch turns on, the saturation voltage

and conduction current contribute to the power loss of a

non–ideal switch. The power loss can be quantified as

WSAT +

VIN

VSAT

where:

VSAT = saturation voltage of the power switch which is

shown in Figure 5.

The switching loss occurs when the switch experiences

both high current and voltage during each switch transition.

This regulator has a 30 ns turn–off time and associated

power loss is equal to

WS +

VIN

20 ns

The turn–on time is much shorter and thus turn–on loss is

not considered here.

The total power dissipated by the IC is sum of all the above

WIC + WQ ) WDRV ) WBASE ) WSAT ) WS

The IC junction temperature can be calculated from the

ambient temperature, IC power dissipation and thermal

resistance of the package. The equation is shown as follows,

TJ + WIC

qJA ) TA

The maximum IC junction temperature shall not exceed

125

°C to guarantee proper operation and avoid any damages

to the IC.

Minimum Load Requirement

As pointed out in the previous section, a minimum load is

required for this regulator due to the pre–driver current

feeding the output. Placing a resistor equal to VO divided by

12 mA should prevent any voltage overshoot at light load

conditions. Alternatively, the feedback resistors can be

valued properly to consume 12 mA current.

COMPONENT SELECTION

Input Capacitor

In a buck converter, the input capacitor witnesses pulsed

current with an amplitude equal to the load current. This

pulsed current and the ESR of the input capacitors determine

the VIN ripple voltage, which is shown in Figure 10. For VIN

ripple, low ESR is a critical requirement for the input

capacitor selection. The pulsed input current possesses a

significant AC component, which is absorbed by the input

capacitors. The RMS current of the input capacitor can be

calculated using:

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