ASIX ELECTRONICS CORPORATION

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AX88655 P 5-Port 10/100/1000BASE-T Ethernet Switch

register of PHYs via MDIO/MDC interface after power on reset. The AX88655 will periodically and continuously poll

and update the link status and link partner’s ability which include speed, duplex mode, and 802.3x flow control capable

status of the connected PHY devices through MDIO/MDC serial interface.

3.7 Port-Based QoS: Port-Pair

AX88655 provides 4 Port-Pairs for bandwidth management. Users can assign any two ports as one Port-Pair with

internal registers basically. Any packets will put the high priority queue of the Port-Pair when send the packets each

other. That is, two ports of each Port-Pair will obtain more bandwidth than other ports when congestion.

In addition, one port can be as the highest priority port if one All_Bit of a Port-Pair is active. That is, user can assign

format of the Port-Pair as OnePort-to-All and every packets of the OnePort will put in the high priority transmit queue of

other ports.