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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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T83C51SND1-ROTIL Datenblatt(PDF) 45 Page - ATMEL Corporation |
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T83C51SND1-ROTIL Datenblatt(HTML) 45 Page - ATMEL Corporation |
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45 / 60 page  45 T8xC51SND1 Rev. D – 15-Nov-01 12.11.2 Timings Test conditions: capacitive load on all pins= 100 pF. Table 51. SPI Interface Master AC Timing VDD= 2.7 to 3.3 V, T A= -40 to +85°C Notes: 1. Value of this parameter depends on software. Symbol Parameter Min Max Unit Slave mode T CHCH Clock Period 8 T OSC T CHCX Clock High Time 3.2 T OSC T CLCX Clock Low Time 3.2 T OSC T SLCH, TSLCL SS# Low to Clock edge 200 ns T IVCL, TIVCH Input Data Valid to Clock Edge 100 ns T CLIX, TCHIX Input Data Hold after Clock Edge 100 ns T CLOV, TCHOV Output Data Valid after Clock Edge 100 ns T CLOX, TCHOX Output Data Hold Time after Clock Edge 0 ns T CLSH, TCHSH SS# High after Clock Edge 0 ns T IVCL, TIVCH Input Data Valid to Clock Edge 100 ns T CLIX, TCHIX Input Data Hold after Clock Edge 100 ns T SLOV SS# Low to Output Data Valid 130 ns T SHOX Output Data Hold after SS# High 130 ns T SHSL SS# High to SS# Low (1) T ILIH Input Rise Time 2 µs T IHIL Input Fall Time 2 µs T OLOH Output Rise time 100 ns T OHOL Output Fall Time 100 ns Master mode T CHCH Clock Period 4 T OSC T CHCX Clock High Time 1.6 T OSC T CLCX Clock Low Time 1.6 T OSC T IVCL, TIVCH Input Data Valid to Clock Edge 50 ns T CLIX, TCHIX Input Data Hold after Clock Edge 50 ns T CLOV, TCHOV Output Data Valid after Clock Edge 65 ns T CLOX, TCHOX Output Data Hold Time after Clock Edge 0 ns T ILIH Input Data Rise Time 2 µs T IHIL Input Data Fall Time 2 µs T OLOH Output Data Rise time 50 ns T OHOL Output Data Fall Time 50 ns |
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