CDC305

OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER

SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995

5

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

CLK

Q1

CLR, PRE

1

0

tPHL1

tPHL2

tPHL3

tPHL4

tPLH1

tPLH2

tPLH3

tPLH4

tPHL7

tPLH7

tPHL8

tPLH8

Q2

Q3

Q4

Q7

Q8

tPHL5

tPLH5

tPHL6

tPLH6

Q5

Q6

NOTES: A. tsk(o) CLK to Q are calculated as the greater of:

– The difference between the fastest and slowest of tPLHn (n = 1, 2, 3, 4)

– The difference between the fastest and slowest of tPHLn (n = 1, 2, 3, 4)

B. tsk(o) CLK to Q are calculated as the greater of:

– The difference between the fastest and slowest of tPLHn (n = 5, 6, 7, 8)

– The difference between the fastest and slowest of tPHLn (n = 5, 6, 7, 8)

C. tsk(o) CLK to Q and Q are calculated as the greater of:

– The difference between the fastest and slowest of tPLHn (n = 1, 2, 3, 4), tPHLn (n = 5, 6, 7, 8)

– The difference between the fastest and slowest of tPHLn (n = 1, 2, 3, 4), tPLHn (n = 5, 6, 7, 8)

D. tsk(p) is calculated as the greater of | tPLHn – tPHLn | (n = 1, 2, 3, ..., 8).