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TPS1663 Datenblatt(PDF) 32 Page - Texas Instruments |
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TPS1663 Datenblatt(HTML) 32 Page - Texas Instruments |
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32 / 43 page ![]() TOP Layer GND Plane BOTTOM Layer GND Plane BOTTOM Layer GND Plane Via to Bottom Layer Top Layer Top Layer GND Plane Bottom layer GND plane VOUT PLANE D2 OVP N.C IN P_IN IN SHDN OUT OUT GND N.C ILIM dVdT PGOOD MODE IN N.C UVLO IMON FLT OUT VIN PLANE High Frequency Bypass cap D1 32 TPS1663 SLVSET9D – SEPTEMBER 2018 – REVISED AUGUST 2019 www.ti.com Product Folder Links: TPS1663 Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated Layout Example (continued) Figure 40. Typical PCB Layout Example with HTSSOP Package with a 2 Layer PCB |
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