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H5TC4G43BFR-RDA Datenblatt(PDF) 20 Page - Hynix Semiconductor

Teilenummer H5TC4G43BFR-RDA
Bauteilbeschribung  4Gb DDR3L SDRAM
PDF  33 Pages
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Hersteller  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5TC4G43BFR-RDA Datenblatt(HTML) 20 Page - Hynix Semiconductor

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Rev. 1.0 / Nov. 2013
20
Table 4 - IDD1 Measurement-Loop Patterna)
a) DM must be driven LOW all the time. DQS, DQS are used according to RD Commands, otherwise MID-LEVEL.
b) Burst Sequence driven on each DQ signal by Read Command. Outside burst operation, DQ signals are MID_LEVEL.
Datab)
0
0
ACT
0
0
1
1
0
0
00
0
0
0
0
-
1,2
D, D
1
0
0
0
0
0
00
0
0
0
0
-
3,4
D, D
11
1
1
0
0
00
0
0
0
0
-
...
repeat pattern 1...4 until nRCD - 1, truncate if necessary
nRCD
RD
0
1
0
1
0
0
00
0
0
0
0
00000000
...
repeat pattern 1...4 until nRAS - 1, truncate if necessary
nRAS
PRE
0
0
1
0
0
0
00
0
0
0
0
-
...
repeat pattern 1...4 until nRC - 1, truncate if necessary
1*nRC+0
ACT
0
0
1
1
0
0
00
0
0
F
0
-
1*nRC+1,2
D, D
1
0
0
0
0
0
00
0
0
F
0
-
1*nRC+3,4
D, D
11
1
1
0
0
00
0
0
F
0
-
...
repeat pattern nRC + 1,...4 until nRC + nRCE - 1, truncate if necessary
1*nRC+nRCD
RD
0
1
0
1
0
0
00
0
0
F
0
00110011
...
repeat pattern nRC + 1,...4 until nRC + nRAS - 1, truncate if necessary
1*nRC+nRAS
PRE
0
0
1
0
0
0
00
0
0
F
0
-
...
repeat pattern nRC + 1,...4 until *2 nRC - 1, truncate if necessary
1 2*nRC
repeat Sub-Loop 0, use BA[2:0] = 1 instead
2 4*nRC
repeat Sub-Loop 0, use BA[2:0] = 2 instead
3 6*nRC
repeat Sub-Loop 0, use BA[2:0] = 3 instead
4 8*nRC
repeat Sub-Loop 0, use BA[2:0] = 4 instead
5 10*nRC
repeat Sub-Loop 0, use BA[2:0] = 5 instead
6 12*nRC
repeat Sub-Loop 0, use BA[2:0] = 6 instead
7 14*nRC
repeat Sub-Loop 0, use BA[2:0] = 7 instead



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