74HC4094DB-Q100 datasheet(10/19 Pages) NEXPERIA

10 / 19 page

Nexperia

74HC4094-Q100; 74HCT4094-Q100

8-stage shift-and-store bus register

25 °C

-40 °C to +85 °C -40 °C to +125 °C

Symbol Parameter Conditions

Min Typ Max

Min

Max

Min

Max

Unit

74HCT4094-Q100

CP to QS1; see Fig. 8

[1]

VCC = 4.5 V

VCC = 5 V; CL = 15 pF

CP to QS2; see Fig. 8

[1]

VCC = 4.5 V

VCC = 5 V; CL = 15 pF

CP to QPn; see Fig. 8

[1]

VCC = 4.5 V

VCC = 5 V; CL = 15 pF

STR to QPn; see Fig. 9

[1]

VCC = 4.5 V

tpd

propagation

delay

VCC = 5 V; CL = 15 pF

OE to QPn; see Fig. 10

[1]

ten

enable time

VCC = 4.5 V

OE to QPn; see Fig. 10

[1]

tdis

disable time

VCC = 4.5 V

QPn and QSn; see Fig. 8

[1]

transition

time

VCC = 4.5 V

CP HIGH or LOW;

see Fig. 8

VCC = 4.5 V

STR HIGH; see Fig. 9

pulse width

VCC = 4.5 V

Dn to CP; see Fig. 11

VCC = 4.5 V

CP to STR; see Fig. 9

tsu

set-up time

VCC = 4.5 V

Dn to CP; see Fig. 11

VCC = 4.5 V

CP to STR; see Fig. 9

hold time

VCC = 4.5 V

-4

CP; see Fig. 8

VCC = 4.5 V

MHz

fmax

maximum

frequency

VCC = 5 V; CL = 15 pF

MHz

CPD

power

dissipation

capacitance

CL = 50 pF; f = 1 MHz;

VI = GND to VCC - 1.5 V

[2]

[1] tpd is the same as tPLH and tPHL; ten is the same as tPZH and tPZL; tdis is the same as tPLZ and tPHZ; tt is the same as tTHL and tTLH.

[2] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD x VCC2 x fi x N + ∑(CL x VCC2 x fo) where:

fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF;

VCC = supply voltage in V; N = number of inputs switching; ∑(CL x VCC2 x fo) = sum of outputs.

74HC_HCT4094_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 14 November 2018

10 / 19

74HC4094DB-Q100 Datenblatt(PDF) 10 Page - Nexperia B.V. All rights reserved

74HC4094DB-Q100 Datenblatt(HTML) 10 Page - Nexperia B.V. All rights reserved

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datenblatt Download

Link URL