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ST92195D7 Datenblatt(PDF) 42 Page - STMicroelectronics |
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ST92195D7 Datenblatt(HTML) 42 Page - STMicroelectronics |
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42 / 249 page ![]() 42/249 ST92195C/D - DEVICE ARCHITECTURE MMU REGISTERS (Cont’d) Figure 18. Memory Addressing Scheme (example) 3FFFFFh 294000h 240000h 23FFFFh 20C000h 200000h 1FFFFFh 040000h 03FFFFh 030000h 020000h 010000h 00C000h 000000h DMASR ISR CSR DPR3 DPR2 DPR1 DPR0 4M bytes 16K 16K 16K 64K 64K 64K 16K |
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