| Datenblatt-Suchmaschine für elektronische Bauteile |
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XRT83SL34 Datenblatt(PDF) 52 Page - Exar Corporation |
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XRT83SL34 Datenblatt(HTML) 52 Page - Exar Corporation |
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52 / 80 page ![]() XRT83SL34 QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. P1.0.8 PRELIMINARY 49 D3 TXON_n Transmitter ON: Writing a “1” into this bit location turns on the Transmit Section of channel n. Writing a “0” shuts off the Transmit Section of channel n. In this mode, TTIP_n and TRING_n driver outputs will be tri-stated for power reduction or redundancy applications. NOTE: This bit provides independent turn-off or turn-on control for each transmitter channel. R/W 0 D2 LOOP2_n Loop-Back control bit 2: This bit together with the LOOP1 and LOOP0 bits control the Loop-Back modes of the chip according to the following table: D1 LOOP1_n Loop-Back control bit 1: See description of bit D2 for the function of this bit. R/W 0 D0 LOOP0_n Loop-Back control bit 0: See description of bit D2 for the function of this bit. R/W 0 TABLE 21: MICROPROCESSOR REGISTER #2, BIT DESCRIPTION LOOP2 0 1 1 1 1 LOOP1 X 0 0 1 1 LOOP0 X 0 1 0 1 Loop-Back Mode No Loop-Back Dual Loop-Back Analog Loop-Back Remote Loop-Back Digital Loop-Back |
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