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LPC55S6X Datenblatt(PDF) 13 Page - NXP Semiconductors |
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LPC55S6X Datenblatt(HTML) 13 Page - NXP Semiconductors |
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13 / 128 page ![]() LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2020. All rights reserved. Product data sheet Rev. 1.9 — 10 February 2020 13 of 128 NXP Semiconductors LPC55S6x 32-bit ARM Cortex-M33 microcontroller PIO0_6/ TDO 57 B7 89 [2] ZI/O 0 PIO0_6 — General-purpose digital input/output pin. In boundary scan mode: TDO (Test Data Out). Remark: In ISP mode, this pin is set to the Flexcomm 3 SPI SCK function. I/O 1 FC3_SCK — Flexcomm 3: USART, SPI, or I2S clock. I2 CTIMER_INP13 — Capture input to CTIMER input multiplexers. O3 CTIMER4_MAT0 — 32-bit CTimer4 match output 0. I4 SCT0_GPI6 — Pin input 6 to SCTimer/PWM. 5 R — Reserved. 6 R — Reserved. 7 R — Reserved. 8 R — Reserved. 9 R — Reserved. I/O 1 0 SEC_PIO0_6 — Secure GPIO pin. PIO0_7 1 G5 6 [2] ZI/O 0 PIO0_7 — General-purpose digital input/output pin. I/O 1 FC3_RTS_SCL_SSEL1 — Flexcomm 3: USART request-to-send, I2C clock, SPI slave select 1. O2 SD0_CLK — SD/MMC 0 card clock. I/O 3 FC5_SCK — Flexcomm 5: USART, SPI, or I2S clock. I/O 4 FC1_SCK — Flexcomm 1: USART, SPI, or I2S clock. 5 R — Reserved. 6 R — Reserved. 7 R — Reserved. 8 R — Reserved. 9 R — Reserved. I/O 1 0 SEC_PIO0_7 — Secure GPIO pin. Table 3. Pin description …continued Symbol Description |
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