JS28F256P30T85 datasheet(56/102 Pages) INTEL

56 / 102 page

1-Gbit P30 Family

April 2005

Intel StrataFlash® Embedded Memory (P30)

Datasheet

Order Number: 306666, Revision: 001

See Figure 29, “Example Latency Count Setting using Code 3.

Figure 28.

First-Access Latency Count

Code 1

(Reserved

Code 6

Code 5

Code 4

Code 3

Code 2

Code 0 (Reserved)

Code 7

Valid

Address

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

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Output

Address[A]

ADV#[V]

15-0 [D/Q]

CLK[C]

15-0 [D/Q]

Table 23.

LC and Frequency Support

Latency Count Settings

Frequency Support (MHz)

≤ 27

≤ 40

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