MAS3549F datasheet(8/92 Pages) MICRONAS

8 / 92 page

MAS 35x9F

DATA SHEET

June 30, 2004; 6251-505-1DS

Micronas

2. Functional Description

2.1. Overview

The MAS 35x9F is intended for use in portable con-

sumer audio applications. It receives parallel or serial

data streams and decodes MPEG Layer 2 and 3

(including the low sampling frequency extensions) and

MPEG 2 AAC. A low bit-rate speech codec, compliant

to the ITU Standard G.729 Annex A, is integrated.

Additional downloadable software modules (SDMI,

other audio/speech encoders/decoders) are available

on request.

2.2. Architecture of the MAS 35x9F

The hardware of the MAS 35x9F consists of a high-

performance RISC Digital Signal Processor (DSP),

and appropriate interfaces. A hardware overview of the

IC is shown in Fig. 2–1.

2.3. DSP Core

The internal processor is a dedicated DSP for

advanced audio applications.

Fig. 2–1: The MAS 35x9F architecture

DSP Core

÷2

Audio Codec

Mic. Input

(incl. Bias)

Line Input

S/PDIF Input 1

S/PDIF Input 2

Serial Audio

(I2S, SDI)

Serial Audio

(stream, SDIB)

VBAT

Xtal

18.432 MHz

CLKO

Parallel

I/O Bus

(PIO)

I2C

S/PDIF

Output

Serial

Audio

(I2S, SDO)

Audio

Output

control

ALU

MAC

Accumulators

ROM

Registers

Div.

A/D

Audio

Proc.

D/A

Control

DCCF

DCFR

DSP

Codec

Volt.

Mon.

I2C

Interface

Div.

Scaler

Osc.

PLL

Synth.

Synthesizer

Clock

MIX

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