PCK351DB datasheet(2/17 Pages) PHILIPS

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Philips Semiconductors

PCK351

1:10 clock distribution device with 3-State outputs

Product data

Rev. 01 — 14 May 2002

2 of 17

9397 750 09791

Quick reference data

[1]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

∑ (C

L × VCC

× f

o) = sum of outputs;

CL = output load capacitance in pF;

VCC = supply voltage in Volts.

Ordering information

Table 1:

Quick reference data

GND = 0 V; Tamb =25 °C; tr =tf ≤ 3.0 ns.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tPHL/tPLH

propagation delay: A to Yn

CL = 50 pF; VCC = 3.3 V

3.1

3.6

4.1

input capacitance

VI =VCC or GND

output capacitance

VI =VCC or GND

CPD

power dissipation capacitance[1]

CL = 50 pF; f = 1 MHz

Table 2:

Ordering information

Type number

Package

Name

Description

Version

PCK351D

SO24

plastic small outline package; 24 leads; body width 7.5 mm

SOT137-1

PCK351DB

SSOP24

plastic shrink small outline package; 24 leads; body width 5.3 mm

SOT340-1

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