__________Applications Information
The HWD481/HWD483/HWD485/HWD487–HWD491 and
HWD1487 are low-power transceivers for RS-485 and RS-
422 communications. The HWD481, HWD485, HWD490,
HWD491, and HWD1487 can transmit and receive at data
rates up to 2.5Mbps, while the HWD483, HWD487,
HWD488, and HWD489 are specified for data rates up to
250kbps. The HWD488–HWD491 are full-duplex trans-
ceivers while the HWD481, HWD483, HWD485, HWD487,
and HWD1487 are half-duplex. In addition, Driver Enable
(DE) and Receiver Enable (RE) pins are included on the
HWD481, HWD483, HWD485, HWD487, HWD489,
HWD491, and HWD1487. When disabled, the driver and
receiver outputs are high impedance.
HWD487/HWD1487:
128 Transceivers on the Bus
The 48kΩ, 1/4-unit-load receiver input impedance of the
HWD487 and HWD1487 allows up to 128 transceivers
on a bus, compared to the 1-unit load (12kΩ input
impedance) of standard RS-485 drivers (32 trans-
ceivers maximum). Any combination of HWD487/
HWD1487 and other RS-485 transceivers with a total of
32 unit loads or less can be put on the bus. The
HWD481/HWD483/HWD485 and HWD488–HWD491 have
standard 12kΩ Receiver Input impedance.
Low-Power, Slew-Rate-Limited
RS-485/RS-422 Transceivers
HWD488
HWD490
TOP VIEW
1
2
3
4
RO
DI
GND
8
7
6
5
A
B
Z
Y
VCC
DIP/SO
R
D
Rt
Rt
VCC
5
6
7
8
RO
DI
GND
4
GND
DI
RO
3
2
A
B
Y
Z
VCC
DR
R
D
1
3
VCC
4
RO
2
A
1
6
5
7
8
GND
DI
Y
Z
B
µMAX
HWD488
HWD490
NOTE: TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
HWD489
HWD491
DIP/SO
TOP VIEW
Rt
Rt
DE
VCC
RE GND
VCC RE
GND
DE
RO
DI
9
10
12
11
B
A
Z
Y
5
RO
NC
DI
2
1, 8, 13
3
6, 7
14
4
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
N.C.
N.C.
A
B
Z
Y
N.C.
RO
RE
DE
DI
GND
GND
R
D
D
RD
R
Figure 2. HWD488/HWD490 Pin Configuration and Typical Operating Circuit
Figure 3. HWD489/HWD491 Pin Configuration and Typical Operating Circuit
8
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