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LTC6373

Rev. 0

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Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC6373 is capable of producing peak output currents in

excess of 40mA. Current density limitations within the IC require the

continuous RMS current supplied by the output (sourcing or sinking)

over the operating lifetime of the part be limited to under 40mA (Absolute

Maximum).

Note 3: A heat sink may be required to keep the junction temperature

below absolute maximum when the output is shorted indefinitely.

Note 4: The LTC6373I is guaranteed functional over the operating

temperature range of –40°C to 85°C. The LTC6373H is guaranteed

functional over the operating temperature range of –40°C to 125°C.

Note 5: The LTC6373I is guaranteed to meet specified performance

from –40°C to 85°C. The LTC6373H is guaranteed to meet specified

performance from –40°C to 125°C.

Note 6: Guaranteed by design.

Note 7: ESD (Electrostatic Discharge) sensitive device. ESD protection

devices are used extensively internal to the LTC6373; however, high

electrostatic discharge can damage or degrade the device. Use proper ESD

handling precautions.

Note 8: Input bias current is defined as the maximum of the input currents

flowing into either of the input pins (–IN and +IN). Input Offset current is

defined as the difference between the input currents (IOS = IB+ – IB–).

Note 9: Input CMRR (CMRR) is defined as the ratio of the change in

the input common mode voltage at the pins +IN or –IN to the change

in differential input referred offset voltage. Output CMRR (CMRRIO) is

defined as the ratio of the change in the voltage at the VOCM pin to the

change in differential input referred offset voltage.

Note 10: Differential power supply rejection ratio (PSRR) is defined as

the ratio of the change in supply voltage to the change in differential

input referred offset voltage. Common mode power supply rejection ratio

(PSRRCM) is defined as the ratio of the change in supply voltage to the

change in the common mode offset voltage.

Note 11: This parameter is measured in a high speed automatic tester

that does not measure the thermal effects with longer time constants. The

magnitude of these thermal effects are dependent on the package used,

PCB layout, heat sinking and air flow conditions.

Note 12: Hysteresis in output voltage is created by mechanical stress

that differs depending on whether the IC was previously at a higher or

lower temperature. Output voltage is always measured at 25°C, but

the IC is cycled to the hot or cold temperature limit before successive

measurements. For instruments that are stored in well controlled

temperatures (within 20 or 30 degrees of operational temperature),

hysteresis is usually not a significant error source. Typical Hysteresis is

the worst case of differential offset measured between 25°C to -40°C to

25°C thermal cycle and 25°C to 125°C to 25°C thermal cycle.

ELECTRICAL CHARACTERISTICS

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