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STM32MP157D Datenblatt(PDF) 28 Page - STMicroelectronics

Teilenummer STM32MP157D
Bauteilbeschribung  Arm® dual Cortex®-A7 800 MHz Cortex®-M4 MPU, 3D GPU, TFT/DSI, 37 comm. interfaces, 29 timers, adv. analog
PDF  259 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STM32MP157D Datenblatt(HTML) 28 Page - STMicroelectronics

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Functional overview
STM32MP157A/D
28/259
DS12504 Rev 5
3.8
Power supply management
3.8.1
Power supply scheme
The VDD is the main supply for I/Os and internal part kept powered during Standby
mode. Useful voltage range is 1.71 V to 3.6 V (e.g. 1.8 V, 2.5 V, 3.0 V or 3.3 V typ.)
–VDD_DSI, VDD_PLL and VDD_ANA must be star-connected to VDD.
The VDDCORE is the main digital voltage and is usually shutdown during Standby mode.
Voltage range during Run mode is 1.18 V to 1.25/1.38 V (1.2/1.34 V typ.), see
Table 13: General operating conditions.
The VBAT pin can be connected to the external battery (1.2 V < VBAT < 3.6 V). If no
external battery is used, it is mandatory to connect this pin to VDD.
The VDDA pin is the analog (ADC/DAC/VREF), supply voltage range is 1.71 V to 3.6 V.
DAC can only be used when VDDA is above or equal 1.8 V. Using Internal VREF+
requires VDDA equal to or higher than VREF+ + 0.3 V.
The VDDA1V8_REG pin is the output of internal regulator and connected internally to
USB PHY and USB PLL. Internal VDDA1V8_REG regulator is enabled by default and can
be controlled by software. It is always shut down during Standby mode.
There is specific BYPASS_REG1V8 pin that must be connected either to VSS or VDD to
activate or deactivate the voltage regulator. It is mandatory to bypass the 1.8 V
regulator when VDD is below 2.25 V (BYPASS_REG1V8 = VDD). In that case,
VDDA1V8_REG pin must be connected to VDD (if below 1.98 V) or to a dedicated
1.65 V - 1.98 V supply (1.8 V typ.).
VDDA1V8_DSI is the analog DSI supply. Voltage range is 1.65 V to 1.98 V. (1.8 V typ.)
Should be connected to VDDA1V8_REG.
VDDA1V1_REG pin is the output of internal regulator connected internally to USB PHY.
Internal VDDA1V1_REG regulator is enabled by default and can be controlled by
software. It is always shut down during Standby mode.
VDDA1V2_DSI_REG pin is the output of internal regulator and connected internally to
DSI PLL.
VDDA1V2_DSI_PHY is the analog DSI PHY supply and should be connected to
VDDA1V2_DSI_REG.
VDD3V3_USBHS and VDD3V3_USBFS are respectively the USB high-speed and full-speed
PHY supply. Voltage range is 3.07 V to 3.6 V. VDD3V3_USBFS is used to supply
OTG_VBUS and ID pins. So, VDD3V3_USBFS must be supplied as well when USB high-
speed OTG device is used. If not used, must be connected to VDD.
Caution:
VDD3V3_USBHS must not be present unless VDDA1V8_REG is present, otherwise permanent
STM32MP157A/D damage could occur. Must be ensured by PMIC ranking order or with
external component in case of discrete component power supply implementation.
VDDQ_DDR is the DDR IO supply.
Voltage range is 1.425 V to 1.575 V for interfacing DDR3 memories (1.5 V typ.).
Voltage range is 1.283 V to 1.45 V for interfacing DDR3L memories (1.35 V typ.).
Voltage range is 1.14 V to 1.3 V for interfacing LPDDR2 or LPDDR3 memories
(1.2 V typ.).



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