AM6421 datasheet(73/237 Pages) TI

73 / 237 page

Table 6-51. OSPI0 Signal Descriptions (continued)

SIGNAL NAME

PIN TYPE

DESCRIPTION

ALV

OSPI0_D6

OSPI Data 2

N18

OSPI0_D7

OSPI Data 2

M17

OSPI0_RESET_OUT0

OSPI Reset

L17

OSPI0_RESET_OUT1

OSPI Reset

K17

6.3.16 GPMC

6.3.16.1 MAIN Domain

Table 6-52. GPMC0 Signal Descriptions

SIGNAL NAME

PIN TYPE

DESCRIPTION

ALV

GPMC0_ADVn_ALE

GPMC Address Valid (active low) or Address Latch

Enable

P16

GPMC0_CLK

GPMC clock

R17

GPMC0_DIR

GPMC Data Bus Signal Direction Control

N17

GPMC0_OEn_REn

GPMC Output Enable (active low) or Read Enable

(active low)

R18

GPMC0_WEn

GPMC Write Enable (active low)

T21

GPMC0_WPn

GPMC Flash Write Protect (active low)

N16

GPMC0_A0

GPMC Address 0 Output. Only used to effectively

address 8-bit data non-multiplexed memories

U2, U7

GPMC0_A1

GPMC address 1 Output in A/D non-multiplexed mode

and Address 17 in A/D multiplexed mode

AA2, V7

GPMC0_A2

GPMC address 2 Output in A/D non-multiplexed mode

and Address 18 in A/D multiplexed mode

T2, W7

GPMC0_A3

GPMC address 3 Output in A/D non-multiplexed mode

and Address 19 in A/D multiplexed mode

V4, W11

GPMC0_A4

GPMC address 4 Output in A/D non-multiplexed mode

and Address 20 in A/D multiplexed mode

U4, V11

GPMC0_A5

GPMC address 5 Output in A/D non-multiplexed mode

and Address 21 in A/D multiplexed mode

AA12, V1

GPMC0_A6

GPMC address 6 Output in A/D non-multiplexed mode

and Address 22 in A/D multiplexed mode

W1, Y12

GPMC0_A7

GPMC address 7 Output in A/D non-multiplexed mode

and Address 23 in A/D multiplexed mode

W12, Y4

GPMC0_A8

GPMC address 8 Output in A/D non-multiplexed mode

and Address 24 in A/D multiplexed mode

AA13, T6

GPMC0_A9

GPMC address 9 Output in A/D non-multiplexed mode

and Address 25 in A/D multiplexed mode

U11, U6

GPMC0_A10

GPMC address 10 Output in A/D non-multiplexed mode

and Address 26 in A/D multiplexed mode

U5, V15

GPMC0_A11

GPMC address 11 Output in A/D non-multiplexed mode