9

Figure 19. AMMC-5024 Schematic.

GND

Drain Bias

(Vdd)

Nine Identical

Vdd AUX

Second Gate

First Gate

Bias (Vg1)

RF_Input

DET_OUT

RF_Output

DET_BIAS

DET_REF

Assembly Techniques

ThebacksideoftheMMICchipisRFground.Formicrostrip

applicationsthechipshouldbeattacheddirectlytothe

groundplane(e.g.circuitcarrierorheatsink)usingelectri-

Forbestperformance,thetopsideoftheMMICshouldbe

broughtuptothesameheightasthecircuitsurrounding

it.Thiscanbeaccomplishedbymountingagoldplated

metalshim(samelengthastheMMIC)underthechip

whichisofcorrectthicknesstomakethechipandadja-

centcircuitthesameheight.Theamountofepoxyused

forthechiporshimattachmentshouldbejustenoughto

provideathinfilletaroundthebottomperimeterofthe

chip.Thegroundplaneshouldbefreeofanyresiduethat

mayjeopardizeelectricalormechanicalattachment.

RFconnectionsshouldbekeptasshortasreasonableto

minimizeperformancedegradationduetoundesirable

seriesinductance.Asinglebondwireisnormallysuf-

ficientforsingleconnections,howeverdoublebonding

with0.7milgoldwirewillreduceseriesinductance.Gold

thermo-sonicwedgebondingisthepreferredmethod

forwireattachmenttothebondpads.Therecommended

wirebondstagetemperatureis150°c±2°c.

CautionshouldbetakentonotexceedtheAbsoluteMaxi-

mumRatingforassemblytemperatureandtime.

Thechipis100umthickandshouldbehandledwithcare.

ThisMMIChasexposedairbridgesonthetopsurfaceand

shouldbehandledbytheedgesorwithacustomcollet

(donotpickupthediewithavacuumondiecenter).

Bondingpadsandchipbacksidemetallizationaregold.

ThisMMICisalsostaticsensitiveandESDprecautions

shouldbetaken.Eutecticattachisnotrecommendedand

mayjeopardizereliabilityofthedevice.

FormoredetailedinformationseeAvagoTechnologies’

ApplicationNote#5359“GaAsMMICassemblyandhan-

dlingguidelines”.

Notes:

1. Ablebond84-1LMlsilverepoxyisrecommended

2.Eutecticattachisnotrecommendedandmayjeopardizereliability

ofthedevice