80C251SB16 datasheet(21/36 Pages) INTEL

21 / 36 page

PRELIMINARY

8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER

AVDV

Address (P0) Valid to Valid Data/Instruction In

@ 12 MHz

@ 16 MHz

243.2

160

4(1+M/2)

OSC – 90

(3)

AVDV

Address (P2) Valid to Valid Data/Instruction In

@ 12 MHz

@ 16 MHz

268.2

185

4(1+M/2)

OSC – 65

(3)

AVDV

Address (P0) Valid to Valid Instruction In

@ 12 MHz

@ 16 MHz

116.6

OSC – 50

AVRL (2)

Address Valid to RD#/PSEN# Low

@ 12 MHz

@ 16 MHz

121.6

2(1+M)

OSC – 45

(3)

AVWL

Address (P0) Valid to WR# Low

@ 12 MHz

@ 16 MHz

126.6

2(1+M)

OSC – 40

(3)

AVWL

Address (P2) Valid to WR# Low

@ 12 MHz

@ 16 MHz

146.6

105

2(1+M)

OSC – 20

(3)

WHQX

Data Hold after WR# High

@ 12 MHz

@ 16 MHz

63.3

42.5

OSC – 20

QVWH

Data Valid to WR# High

@ 12 MHz

@ 16 MHz

138.6

2(1+N)

OSC – 28

(4)

WHAX

WR# High to Address Hold

@ 12 MHz

@ 16 MHz

156.6

115

OSC – 10

Table 11. AC Characteristics (Continued)

Symbol

Parameter

@ Max Fosc (1)

Fosc Variable

Units

Min

Max

Min

Max

NOTES:

16 MHz.

Specifications for PSEN# are identical to those for RD#.

In the formula, M=Number of wait states (0 or 1) for ALE.

In the formula, N=Number of wait states (0,1,2, or 3) for RD#/PSEN#/WR#.

“Typical” specifications are untested and not guaranteed.

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