Table 8-3. TUSB217A Registers (continued)

Offset

Acronym

Register Name

Section

0xE

DC_BOOST

This register is setting DC BOOST level.

Go

0x25

RX_SEN

This register is setting RX Sensitivity level.

Go

Complex bit access types are encoded to fit into small table cells. Table 8-4 shows the codes that are used for

access types in this section.

Table 8-4. TUSB217A Access Type Codes

Access Type

Code

Description

Read Type

RH

H

R

Set or cleared by hardware

Read

Write Type

W

W

Write

Reset or Default Value

-n

Value after reset or the default

value

8.5.1 EDGE_BOOST Register (Offset = 0x1) [reset = X]

EDGE_BOOST is shown in Figure 8-1 and described in Table 8-5.

Return to Summary Table.

This register is setting EDGE BOOST level.

Figure 8-1. EDGE_BOOST Register

7

6

5

4

3

2

1

0

ACB_LVL

RESERVED

RH/W-X

RH/W-X

Table 8-5. EDGE_BOOST Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

ACB_LVL

RH/W

X

XXXXb (sampled at startup from BOOST pin)

0000b to 1111b range

0x0 = BOOST PIN LEVEL 0 (lowest edge boost setting)

0x3 = BOOST PIN LEVEL 1

0x6 = BOOST PIN LEVEL 2

0xA = BOOST PIN LEVEL 3

0xF = (highest edge boost setting)

3-0

RESERVED

RH/W

X

These bits are reserved bits and set by hardware at reset.

When this register is modified the software should first read these

reserved bits and rewrite with the same values

8.5.2 CONFIGURATION Register (Offset = 0x3) [reset = X]

CONFIGURATION is shown in Figure 8-2 and described in Table 8-6.

Return to Summary Table.

This register is selecting device mode.

TUSB217A

SLLSFK5 – JUNE 2021

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