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ICS16857 Datenblatt(PDF) 5 Page - Integrated Circuit Systems

Teilenummer ICS16857
Bauteilbeschribung  DDR 14-Bit Registered Buffer
PDF  8 Pages
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Hersteller  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS16857 Datenblatt(HTML) 5 Page - Integrated Circuit Systems

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ICSSSTV16857
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Timing Requirements
(over recommended operating free-air temperature range, unless otherwise noted)
SYMBOL
PARAMETERS
VDD=2.5±0.2V
UNITS
MIN
TYP
MAX
fclock
Clock frequency
133
200
MHz
tPD
Clock to output time
1.1
2.4
2.8
ns
tRST
Reset to output time
3.1
5
ns
tSL
Output slew rate
1
1.5
4
V/ns
Setup time, fast slew rate
2, 4
Data before CK
D , CK#E
0.75
0.018
ns
tSU
Setup time, slow slew rate
3, 4
0.9
ns
Hold time, fast slew rate
2,4
Data after CK
D , CK#E
0.75
0.145
ns
Th
Hold time, slow slew rate
3, 4
0.9
ns
Notes:
1 - Guaranteed by design, not 100% tested in production.
2 - For data signal input slew rate =1V/ns.
4 - CLK, CLK# signals input slew rates are =1V/ns.
3 - For data signal input slew rate =0.5V/ns and < 1V/ns.
Sw itching Characteristics
(over recom m ended operating free-air tem perature range, unles s otherwis e noted)
SYMBOL
From
To
VDD=2.5±0.2V
UNITS
(Input)
(Output)
MIN
TYP
MAX
fclock
133
200
MHz
tPD
CLK, CLK#
Q
1.1
2.4
2.8
ns
tph1
RESET#
Q
3.1
5
ns



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