P5021 datasheet(13/155 Pages) NXP

13 / 155 page

Pin assignments and reset states

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Freescale Semiconductor

D1_MCK2

Clock

GVDD

—

D1_MCK3

Clock

GVDD

—

D1_MCK0

Clock Complements

GVDD

—

D1_MCK1

Clock Complements

GVDD

—

D1_MCK2

Clock Complements

GVDD

—

D1_MCK3

Clock Complements

GVDD

—

D1_MODT0

On Die Termination

AD10

GVDD

—

D1_MODT1

On Die Termination

AG10

GVDD

—

D1_MODT2

On Die Termination

AD8

GVDD

—

D1_MODT3

On Die Termination

AF10

GVDD

—

D1_MDIC0

Driver Impedance Calibration

I/O

GVDD

D1_MDIC1

Driver Impedance Calibration

AA5

I/O

GVDD

DDR SDRAM Memory interface 2

D2_MDQ00

Data

C13

I/O

GVDD

—

D2_MDQ01

Data

A12

I/O

GVDD

—

D2_MDQ02

Data

I/O

GVDD

—

D2_MDQ03

Data

I/O

GVDD

—

D2_MDQ04

Data

A13

I/O

GVDD

—

D2_MDQ05

Data

B13

I/O

GVDD

—

D2_MDQ06

Data

B10

I/O

GVDD

—

D2_MDQ07

Data

I/O

GVDD

—

D2_MDQ08

Data

I/O

GVDD

—

D2_MDQ09

Data

I/O

GVDD

—

D2_MDQ10

Data

I/O

GVDD

—

D2_MDQ11

Data

I/O

GVDD

—

D2_MDQ12

Data

I/O

GVDD

—

D2_MDQ13

Data

I/O

GVDD

—

D2_MDQ14

Data

I/O

GVDD

—

D2_MDQ15

Data

I/O

GVDD

—

D2_MDQ16

Data

I/O

GVDD

—

D2_MDQ17

Data

I/O

GVDD

—

D2_MDQ18

Data

I/O

GVDD

—

D2_MDQ19

Data

I/O

GVDD

—

D2_MDQ20

Data

I/O

GVDD

—

Table 1. Pins listed by bus (continued)

Signal

Signal description

Package

pin number

type

Power

supply

Notes

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