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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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SCIMX6DP5AVT2AB Datenblatt(PDF) 151 Page - NXP Semiconductors |
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SCIMX6DP5AVT2AB Datenblatt(HTML) 151 Page - NXP Semiconductors |
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151 / 160 page  Package Information and Contact Assignments i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018 NXP Semiconductors 151 SD3_DAT0 E14 NVCC_SD3 GPIO ALT5 GPIO7_IO04 Input PU (100K) SD3_DAT1 F14 NVCC_SD3 GPIO ALT5 GPIO7_IO05 Input PU (100K) SD3_DAT2 A15 NVCC_SD3 GPIO ALT5 GPIO7_IO06 Input PU (100K) SD3_DAT3 B15 NVCC_SD3 GPIO ALT5 GPIO7_IO07 Input PU (100K) SD3_DAT4 D13 NVCC_SD3 GPIO ALT5 GPIO7_IO01 Input PU (100K) SD3_DAT5 C13 NVCC_SD3 GPIO ALT5 GPIO7_IO00 Input PU (100K) SD3_DAT6 E13 NVCC_SD3 GPIO ALT5 GPIO6_IO18 Input PU (100K) SD3_DAT7 F13 NVCC_SD3 GPIO ALT5 GPIO6_IO17 Input PU (100K) SD3_RST D15 NVCC_SD3 GPIO ALT5 GPIO7_IO08 Input PU (100K) SD4_CLK E16 NVCC_NANDF GPIO ALT5 GPIO7_IO10 Input PU (100K) SD4_CMD B17 NVCC_NANDF GPIO ALT5 GPIO7_IO09 Input PU (100K) SD4_DAT0 D18 NVCC_NANDF GPIO ALT5 GPIO2_IO08 Input PU (100K) SD4_DAT1 B19 NVCC_NANDF GPIO ALT5 GPIO2_IO09 Input PU (100K) SD4_DAT2 F17 NVCC_NANDF GPIO ALT5 GPIO2_IO10 Input PU (100K) SD4_DAT3 A20 NVCC_NANDF GPIO ALT5 GPIO2_IO11 Input PU (100K) SD4_DAT4 E18 NVCC_NANDF GPIO ALT5 GPIO2_IO12 Input PU (100K) SD4_DAT5 C19 NVCC_NANDF GPIO ALT5 GPIO2_IO13 Input PU (100K) SD4_DAT6 B20 NVCC_NANDF GPIO ALT5 GPIO2_IO14 Input PU (100K) SD4_DAT7 D19 NVCC_NANDF GPIO ALT5 GPIO2_IO15 Input PU (100K) TAMPER E11 VDD_SNVS_IN GPIO ALT0 SNVS_TAMPER Input PD (100K) TEST_MODE E12 VDD_SNVS_IN — — TCU_TEST_MODE Input PD (100K) USB_H1_DN F10 VDD_USB_CAP — — USB_H1_DN — — USB_H1_DP E10 VDD_USB_CAP — — USB_H1_DP — — USB_OTG_CHD_B B8 VDD_USB_CAP — — USB_OTG_CHD_B — — USB_OTG_DN B6 VDD_USB_CAP — — USB_OTG_DN — — USB_OTG_DP A6 VDD_USB_CAP — — USB_OTG_DP — — XTALI A7 NVCC_PLL — — XTALI — — XTALO B7 NVCC_PLL — — XTALO — — 1 The state immediately after reset and before ROM firmware or software has executed. 2 Variance of the pull-up and pull-down strengths are shown in the tables as follows: • Table 21, “GPIO I/O DC Parameters,” on page 39. • Table 23, “LPDDR2 I/O DC Electrical Parameters,” on page 41. • Table 24, “DDR3/DDR3L I/O DC Electrical Parameters,” on page 41. 3 ENET_REF_CLK is used as a clock source for MII and RGMII modes only. RMII mode uses either GPIO_16 or RGMII_TX_CTL as a clock source. For more information on these clocks, see your specific device reference manual and the Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors (IMX6DQ6SDLHDG). Table 87. 21 x 21 mm Functional Contact Assignments (continued) Ball Name Ball Power Group Ball Type Out of Reset Condition1 Default Mode (Reset Mode) Default Function (Signal Name) Input/Output Value2 |
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