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¡ Semiconductor

MSM6586

Address Up/Down Select (AU/D)

Input pin for selecting the direction of automatic address updating.

When the TAS signal is input with the AU/D pin set to "H", the internal address counters are set to

the externally set address for X and to address 0 for Y. Then the address is incremented by 1 every

time RWCK is input.

When the TAS signal is input with the AU/D pin set to "L", the internal address counters are set to

the externally set address in the same way for X but set to address 1023 for Y.

Then the address is decremented by 1 every time RWCK is input. In either case, the X address is

automatically incremented or decremented by 1 when read/write operation for 1024 words ends.

The AU/D pin setting change is possible in any read/write cycle so long as the timing specifications

Chip Select (CS)

Input pin for disabling all input and output pins. This pin enables parallel use of multiple MSM6586s

by connecting the data input and output pins.

Self/Auto Refresh Select (RS/A (TEST))

Pin for selecting a refresh mode in order to retain memory cell data.

If the RS/A pin is set to "L" level, the self-refresh mode is selected and no external refresh control is

required. If the RS/A pin is set to "H" level, the auto-refresh mode is selected and refresh operation

is required to retain memory cell data.

Refresh Clock Input (RFSH (TEST))

Input pin for controlling the external refresh when the auto refresh mode is selected.

When the auto-refresh mode is selected, 1024 refresh operations are required within 100ms via the

RFSH pin while the RWCK is at "H" level.

Fast Access Mode Select (FAM (TEST))

Pin for fast read/write operations.

Fast read/write is possible by keeping the FAMpin at "L" level. The fast access mode is set or released

When 1024-word data access is complete, be sure to insert a normal cycle in order to increment or

decrement the X address.

When the fast access mode is set, the address increment/decrement switching with the AU/D pin

is not available.

Test (TEST, TEST)

The TEST pin is fixed to "L" level.

The TEST pin is fixed to "H" level.