MPC8544EBVTARGA datasheet(58/117 Pages) NXP

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MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

I2C

Figure 37 provides the boundary-scan timing diagram.

Figure 37. Boundary-Scan Timing Diagram

13 I2C

This section describes the DC and AC electrical characteristics for the I2C interfaces of the MPC8544E.

13.1

I2C DC Electrical Characteristics

Table 51 provides the DC electrical characteristics for the I2C interfaces.

Table 51. I2C DC Electrical Characteristics

At recommended operating conditions with OVDD of 3.3 V ± 5%.

Parameter

Symbol

Min

Max

Unit

Notes

Input high voltage level

VIH

0.7

× OV

OVDD +0.3

—

Input low voltage level

VIL

–0.3

0.3

× OV

V—

Low level output voltage

VOL

00.2

× OV

Pulse width of spikes which must be suppressed by the

input filter

tI2KHKL

050

Input current each I/O pin (input voltage is between

0.1

× OV

DD and 0.9 × OVDD(max)

–10

μA3

Capacitance for each I/O pin

—10

—

Notes:

1. Output voltage (open drain or open collector) condition = 3 mA sink current.

2. Refer to the MPC8544EPowerQUICC III Integrated Communications Host Processor Reference Manual for information on

the digital filter used.

3. I/O pins will obstruct the SDA and SCL lines if OVDD is switched off.

VM = Midpoint Voltage (OVDD/2)

tJTDVKH

tJTDXKH

Boundary

Data Outputs

Boundary

Data Outputs

JTAG

External Clock

Boundary

Data Inputs

Output Data Valid

tJTKLDX

tJTKLDZ

tJTKLDV

Input

Data Valid

Output Data Valid

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