ML7055LP datasheet(7/30 Pages) OKI

7 / 30 page

FEDL7055-02

OKI Semiconductor

ML7055

7/30

RF I/F

Pin Placement

Pin Name

Direc-

tion

[*0]

Internal

Pull Up/

Down,

Schmitt

Initial

Value

ML7055

Description

PLLLOCK

Pull

down

—

ML7050: —

CX72303: —

BCM2002X: 1MHz clock

—

PLL_OFF

—

ML7050: PLL loop control

0: Open loop

1: Closed loop

CX72303: Diversity output

BCM2002X: PA Power control

PCM I/F

Pin Placement

Pin Name

Direc-

tion

Internal

Pull Up/

Down,

Schmitt

Initial

Value

ML7055

Description

PCMOUT

—

PCM data output

PCMIN

Pull up

—

PCM data input

PCMSYNC

I/O

Pull

down

—

PCM sync signal (8 kHz),

Initial setting: input

(can be switched by an internal

PCMCLK

I/O

Pull

down

—

PCM clock (64 kHz/128 kHz)

Initial setting: input

(can be switched by an internal

Note: The PCM sync signal (8 kHz) must be guaranteed at the accuracy of

±50 ppm if the

PCMSYNC pin is configured as an input.

UART I/F

Pin Placement

Pin Name

Direc-

tion

Internal

Pull Up/

Down,

Schmitt

Initial

Value

ML7055

Description

SOUT

—

ACE transmit serial data

SIN

Schmitt

—

ACE receive serial data

RTS

—

ACE transmit data ready

CTS

—

ACE transmit ready

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