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ADP5138ACPZ-2-R7 Datenblatt(PDF) 9 Page - Analog Devices

Teilenummer ADP5138ACPZ-2-R7
Bauteilbeschribung  Quad, 1 A, 5.5 V, Synchronous Step-Down Regulators with One RF LDO Regulator
PDF  23 Pages
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
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ADP5138ACPZ-2-R7 Datenblatt(HTML) 9 Page - Analog Devices

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Data Sheet
ADP5138
Rev. A | Page 9 of 23
Pin No.
Mnemonic
Description
24
GND
Analog Ground. Connect this pin to the ground plane.
25
SYNC
Synchronization Input. Connect this pin to an external clock between 2.8 MHz and 3.5 MHz to synchronize the
switching frequency to the external clock. If synchronization function is not used, connect this pin to GND.
26
AVIN
Bias Voltage Input Pin. Connect AVIN to PVINx, and connect a bypass capacitor between AVIN and GND.
27
EN1
Precision Enable Pin for Channel 1. Use an external resistor divider to set the turn-on threshold. To enable
Channel 1 automatically, connect the EN1 pin to PVIN1.
28
FB1
Feedback Voltage Sense Input for Channel 1. Connect this pin to a resistor divider from VOUT1 for the adjustable
version. For the fixed output version, connect this pin to VOUT1 directly.
EP
Exposed Pad. Solder the exposed pad to an external ground plane.



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