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74HC240 Datenblatt(PDF) 2 Page - Silicon Supplies |
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74HC240 Datenblatt(HTML) 2 Page - Silicon Supplies |
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2 / 6 page ![]() d High Speed CMOS Logic – 74HC240 Rev 1.1 30/11/21 Pad Layout and Functions Truth Table Logic Diagram INPUTS OUTPUTS 1OE 2OE 1A, 2A 1Y, 2Y L L H L H X H L Z H = High level (steady state) L = Low level (steady state) X = Don’t care, Z = High impedance 1950µm (76.77 mils) 0,0 COORDINATES (mm) PAD FUNCTION X Y 1 1OE 0.152 0.636 2 1A1 0.152 0.396 3 2Y4 0.300 0.142 4 1A2 0.470 0.152 5 2Y3 0.868 0.132 6 1A3 1.038 0.152 7 2Y2 1.330 0.132 8 1A4 1.709 0.142 9 2Y1 1.729 0.578 10 GND 1.729 0.812 11 2A1 1.699 1.149 12 1Y4 1.729 1.438 13 2A2 1.719 1.804 14 1Y3 1.301 1.824 15 2A3 1.062 1.804 16 1Y2 0.758 1.804 17 2A4 0.468 1.804 18 1Y1 0.142 1.662 19 2OE 0.142 1.489 20 VCC 0.142 1.005 CONNECT CHIP BACK TO VCC OR FLOAT Pad 20 = VCC Pad 10 = GND 15 14 16 17 13 18 19 20 1 2 9 10 11 12 4 5 6 7 3 8 DIE ID Page 2 of 6 www.siliconsupplies.com |
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