MXC62320MP datasheet(6/8 Pages) MEMSIC

6 / 8 page

MEMSIC MXC6232xG/H/M/N Rev.A

Page 6 of 8

4/11/2010

RESOLUTION

The accelerometer resolution is limited by noise. The

output noise will vary with the measurement bandwidth.

With the reduction of the bandwidth, by applying an

external low pass filter, the output noise drops. Reduction

of bandwidth will improve the signal to noise ratio and the

resolution. The output noise scales directly with the square

root of the measurement bandwidth. The maximum

amplitude of the noise, its peak- to- peak value,

approximately defines the worst case resolution of the

measurement. With a simple RC low pass filter, the rms

noise is calculated as follows:

Noise (mg rms) = Noise(mg/ Hz ) *

)

(

Bandwidth

The peak-to-peak noise is approximately equal to 6.6 times

the rms value (for an average uncertainty of 0.1%).

HARDWARE DESIGN CONSIDERATION

1. One capacitor is recommended for best rejection of

power supply noise (reference figure below). The

capacitor should be located as close as possible to the

device supply pin (VDD). The capacitor lead length

should be as short as possible, and a surface mount

capacitor is preferred. For typical applications, the

capacitor can be ceramic 0.1 μF.

Power supply noise rejection

2. Robust low inductance ground wiring should be used.

3. Care should be taken to ensure there is “thermal

symmetry” on the PCB immediately surrounding the

MEMSIC device and that there is no significant heat

source nearby. Based on the experiment, with a

120degC heating source at 11mm away of MEMSIC

device, the offset change will be within 5mg.

4. A metal ground plane should be added directly beneath

the MEMSIC device. The size of the plane should be

similar to the MEMSIC device’s footprint and be as

thick as possible.

5. Vias can be added symmetrically around the ground

plane. These vias will increase the thermal isolation of

the device from the rest of the PCB and improve

performance.

SOFTWARE DESIGN CONSIDERATION

A register or flag is required between I2C MCU (the master

device) and any system level CPU/MCU (if there exists any

system level controller (such as a PC based system). The

potential issue will be that system level controller may read

in MSB and LSB of the same axis from different events of

on-chip A/D conversions, since I2C data length is 8 bits

while the sensor has data length of 12 bits.

I2C INTERFACE DESCRIPTION

A slave mode I2C circuit has been implemented into the

Memsic thermal accelerometer as a standard interface for

customer applications. The A/D converter and MCU

functionality have been added to the Memsic sensor,

thereby increasing ease-of-use, and lowering power

consumption, footprint and total solution cost.

The I2C (or Inter IC bus) is an industry standard bi-

directional two-wire interface bus. A master I2C device can

operate READ/WRITE controls to an unlimited number of

devices on the bus by proper addressing. The Memsic

accelerometer operates only in a slave mode, i.e. only

responding to calls by a master device

I2C BUS CHARACTERISTICS

I2C bus

The two wires in I2C bus are called SDA (serial data line)

and SCL (serial clock line). In order for a data transfer to

start, the bus has to be free, which is defined by both wires

in a HIGH output state. Due to the open-drain/pull-up

resistor structure and wire-AND operation, any device on

the bus can pull lines low and overwrite a HIGH signal.

The data on the SDA line has to be stable during the HIGH

period of the SCL line. In other words, valid data can only

change when the SCL line is LOW.

I2C BUS DATA TRANSFER

A data transfer is started with a “START” condition and

ended with a “STOP” condition. A “START” condition is

SDA (Serial Data Line)

SCL (Serial Clock Line)

DEVICE 1

DEVICE 2

VDD

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