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13

DS-DMX250 R 0.80

www.yamar.com

Tel: +972-3-5445294 Fax: +972-3-5445279

3.5

DMX250 UUID

Each DMX250 device is hard-coded with a 48 bit universally unique identifier (UUID[47:0]).

The UUID is stored in REG_59 to REG_5E and can be retrieved using the READ-REG commands (see ‎5.4 to ‎5.9‎5.9).

3.6

DMX interface typical set-up and operation

1.

Interface HDI, HDO, and HDC (Optional) pins.

2.

Select a carrier frequency (default 13MHz) (see ‎3.4).

3.

Transmit data bytes via HDI pin to the powerline.

4.

Receive data bytes from the powerline via HDO pin.

3.7

DMX Examples

3.7.1

DMX Example 1 - Typical communication flow

Figure 13 depicts a typical TX-RX DMX message flow. The DMX-controller starts a new message with a break signal,

followed by start code and data bytes on DMX250 HDI. Upon detection of the break signal, the DMX250 initiates

the DMX frame over the powerline. After a fixed latency of ~100usec, the DMX250 RX device output on HDO the

break signal, followed by the start code and message received data bytes.

Figure 13 - DMX typical communication sequence

3.7.2

DMX Example 2 - WRITE-REG command

Figure 14 depicts a WRITE-REG command sequence. First, the HDC is pulled low and the device enters the

Command mode. The DMX-controller sends the write command with the 1

register address byte (A[7:0]), and then the data byte to be written (B[7:0]). After completing the write sequence,

the HDC pin is pulled high and the device returns to Normal mode.

Figure 14- DMX Write Register command sequence

3.7.3

DMX Example 3 - READ-REG command

Figure 15 depicts a READ-REG command sequence. First, the HDC is pulled low and the device enters the

Command mode. The user sends the read command with the 1

address byte (A[7:0]). Then the DMX-controller receives the register internal value (B[7:0]). The HDC pulled back to

high and the device returns to Normal mode.

Figure 15 - DMX Read Register command sequence