SP4415DS/06

SP4415 Electroluminescent Lamp Driver

© Copyright 1996 Sipex Corporation

3

THEORY OF OPERATION

The SP4415 is made up of three basic circuit

elements, a clock signal conditioner, a divider

chain, and a switched H-bridge network. The clock

signal conditioner circuit allows users to directly

connect a crystal oscillator output to the SP4415;

no buffering is necessary. The clock input features

high impedance (50 M

Ω), low capacitance (2.5pF)

and 200mV sensitivity. The external clock should

range from (V

optimized for 32,768Hz clock signals and is allowed

to vary from 20 kHz to 60kHz.

The externally supplied clock signal provides the

circuit with a clock source used to control the

charge and discharge phases for the coil and lamp.

The suggested oscillator frequency is 32,768Hz .

This clock frequency is internally divided to create

two internal control signals, f

example a 32,768Hz signal will be divided to

provide an 8,192Hz 75% duty cycle output to drive

the coil and a 256Hz 50% duty cycle output to

drive the lamp. Although the oscillator frequency

can be varied to optimize the lamp output, the ratio

of f

PIN DESCRIPTION

Pin 1 – NC - Float this pin..

Pin 2 – V

Pin 3 – Coil - Coil input, connect coil from V

DD

to Pin 5.

Pin 4 – Lamp2- EL voltage output, connect

directly to EL lamp.

Pin 5 – Lamp1- EL voltage output, connect

directly to EL lamp.

Pin 6 – V

system V

Pin 7 – Level Select - Selects the number of

inductor drive pulses.

Pin 8 – Clk - Clock input for charge and

discharge cycles.

SP4415 Schematic

CLK

SCR1

SCR2

EL Lamp

Coil

2

3

EL1

EL2

4

8

Level Select

5

7

PULSE COUNT

DECODER

HON LEVEL

DECODER

PULSE COUNT

SELECTOR

2 BIT

COUNTER

9 BIT COUNTER

Q

6

7 BIT COUNTER

CLR

Q

35mH/125 ohms

1

2

3

4

8

7

6

5