MDT1051

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P.8

2005/6

Ver. 1.9

7. Reset Condition for all Registers

Register

Address

Power-On Reset,

Power range detector

Reset

/MCLR or WDT Reset

Wake -up from SLEEP

IAR

00h

－

－

－

RTCC

01h

xxxx xxxx

uuuu uuuu

uuuu uuuu

PC

0Ah,02h

00 0000 0000

00 0000 0000

PC+1

STATUS

03h

0001 1xxx

000# #uuu

000# #uuu

MSR

04h

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORT A

05h

- - -1 xxxx

- - -1 uuuu

- - -u uuuu

PORT B

06h

xxxx xxxx

uuuu uuuu

uuuu uuuu

ADS0

08h

00-0 0000

00-0 0000

uu-u uuuu

ADRES

09h

xxxx xxxx

uuuu uuuu

uuuu uuuu

INTS

0Bh

0000 0001

0000 000u

uuuu uuuu

TMR

81h

1111 1111

1111 1111

uuuu uuuu

CPIOA

85h

- - -1 1111

- - -1 1111

- - -u uuuu

CPIOB

86h

1111 1111

1111 1111

uuuu uuuu

PSTA

87h

- - - - - -qq

- - - - - -uu

- - - - --uu

ADS1

88h

- - - - - -00

- - - - - -00

- - - - --uu

Note : u

＝unchanged, x＝unknown, - ＝unimplemented, read as “0”

#

＝value depends on the condition of the following table

Condition

Status: bit 4

Status: bit 3

Status: bit 1

Status: bit 0

/MCLR reset (not during SLEEP)

u

u

1

1

/MCLR reset during SLEEP

1

0

1

1

WDT reset (not during SLEEP)

0

1

1

1

WDT reset during SLEEP

0

0

1

1

Power on reset

1

1

0

X

Power range-detector Reset

1

1

1

0