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STM32F103RCT6 Datenblatt(PDF) 74 Page - STMicroelectronics

Teilenummer STM32F103RCT6
Bauteilbeschribung  High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces
PDF  143 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F103RCT6 Datenblatt(HTML) 74 Page - STMicroelectronics

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Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
74/143
DS5792 Rev 13
Table 36. Synchronous multiplexed PSRAM write timings(1)(2)
1. CL = 15 pF.
2. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(CLK)
FSMC_CLK period
27.7
-
ns
td(CLKL-NExL)
FSMC_CLK low to FSMC_Nex low (x = 0...2)
-
2
ns
td(CLKL-NExH)
FSMC_CLK low to FSMC_NEx high (x = 0...2)
2
-
ns
td(CLKL-NADVL)
FSMC_CLK low to FSMC_NADV low
-
4
ns
td(CLKL-NADVH)
FSMC_CLK low to FSMC_NADV high
5
-
ns
td(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x = 16...25)
-
0
ns
td(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x = 16...25)
2
-
ns
td(CLKL-NWEL)
FSMC_CLK low to FSMC_NWE low
-
1
ns
td(CLKL-NWEH)
FSMC_CLK low to FSMC_NWE high
1
-
ns
td(CLKL-ADV)
FSMC_CLK low to FSMC_AD[15:0] valid
-
12
ns
td(CLKL-ADIV)
FSMC_CLK low to FSMC_AD[15:0] invalid
3
-
ns
td(CLKL-Data)
FSMC_A/D[15:0] valid after FSMC_CLK low
-
6
ns
td(CLKL-NBLH)
FSMC_CLK low to FSMC_NBL high
1
-
ns
tsu(NWAITV-CLKH) FSMC_NWAIT valid before FSMC_CLK high
7
-
ns
th(CLKH-NWAITV)
FSMC_NWAIT valid after FSMC_CLK high
2
-
ns



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