L99H02 datasheet(16/51 Pages) STMICROELECTRONICS

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Electrical specifications

L99H02

16/51

DS12547 Rev 6

Table 14. Gate drivers for external PowerMOS

Item

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Drivers for external high-side PowerMOS

14.1

IGHx(on)

Turn on current

(SOURCE stage)

Tj = 25 °C (1)

0.3

0.5(2)

0.8

14.2.1

RGHx

On-resistance of

SINK stage

VSHx = 0 V; IGHx = 50 mA;

Tj = 25°C



14.2.2

VSHx = 0 V; IGHx = 50 mA;

Tj = 125°C

4.5

5.3



14.3

VGHxH

Gate on voltage

Outputs floating

VSHx +8V VSHx +10 V VSHx +12V

14.4

RGSHx

Passive Gate

clamp resistance



Drivers for external low-side PowerMOS

14.5

IGLx(on)

Turn on current

(SOURCE stage)

Tj = 25°C (1)

0.3

0.5(2)

0.8

14.6.1

RGLx

On-resistance of

SINK stage

VSLx = 0 V; IGLx = 50 mA;

Tj = 25°C



14.6.2

VSLx = 0 V; IGLx = 50 mA;

Tj = 125°C

4.5

5.3



14.7

VGLxH

Gate on voltage

VSLx +8V VSLx +10 V VSLx + 12 V

14.8

RGSLx

Passive gate

clamp resistance



Timing of the drivers

14.9

tGHxHL

Propagation delay

time high to low

VS = 13.5 V; VSHx = 0;

RG = 30 ; CG =4.7 nF

0.8

1.4

1.9

µs

14.10

tGLxHL

Propagation delay

time low to high

VS = 13.5 V; VSLx = 0;

RG =30; CG =4.7 nF

0.6

1.2

1.8

µs

14.11

tGHxr2

Rise time

VS = 13.5 V; VSHx = 0;

RG =0; CG =4.7 nF

170

14.12

tGHxf2

Fall time

VS = 13.5 V; VSHx = 0;

RG =0; CG =4.7 nF

210

14.13

tGLxr2

Rise time

VS = 13.5 V; VSLx = 0;

RG =0; CG =4.7 nF

170

14.14

tGLxf2

Fall time

VS = 13.5 V; VSLx = 0;

RG =0; CG =4.7 nF

210

1. Indirect measurement, parameter measured dynamically using 100 nF load capacitor and evaluating the slew rate.

2. Average value.

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