TDA7808 datasheet(27/39 Pages) STMICROELECTRONICS

27 / 39 page

DS12230 Rev 4

27/39

TDA7808

I2C bus interface

9.1

Writing procedure

There are two possible procedures:

without increment: the I bit is set to 0 and the register to be written is addressed by the

subaddress SUB A. Only this register is written by the DATA byte following the

subaddress byte.

with increment: the I bit is set to 1 and the first register to be written is the one

addressed by subaddress SUB A. Then all the registers from SUB A up to stop bit or

the reaching of last register are written.

9.2

Data validity

The data on the SDA line must be stable during the high period of the clock. The HIGH and

LOW state of the data line can only change when the clock signal on the SCL line is LOW.

9.3

Start and stop conditions

A start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.

The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.

9.4

Byte format

Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an

acknowledge bit. The MSB is transferred first.

9.5

Acknowledge

The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock

pulse. The receiver** has to pull-down (LOW) the SDA line during the acknowledge clock

pulse, so that the SDA line is stable LOW during this clock pulse.

* Transmitter

= master (µP) when it writes an address or instruction byte to the TDA7808

= slave (TDA7808) when the µP reads a data byte from TDA7808

** Receiver

= slave (TDA7808) when the µP writes an address or instruction byte to the TDA7808

= master (µP) when it reads a data byte from TDA7808

9.6

Address selection

To select the proper I2C address a resistor must be connected to ADD pin as follows:

Table 9. Address threshold

ADD2

ADD1

Rload

120K < R

56K < R < 64K

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