NCP12400

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7

Table 5. ELECTRICAL CHARACTERISTICS

(For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, VHV = 125 V, VCC = 11 V unless otherwise noted)

Characteristics

Unit

Max

Typ

Min

Symbol

Test Condition

OUTPUT DRIVER

Rise time, 10 to 90% of VCC

VCC = VCC(off) + 0.2 V,

CDRV = 1 nF

trise

−

40

70

ns

Fall time, 90 to 10% of VCC

VCC = VCC(off) + 0.2 V,

CDRV = 1 nF

tfall

−

30

60

ns

Current capability

VCC = VCC(off) + 0.2 V,

CDRV = 1 nF

DRV high, VDRV = 0 V

DRV low, VDRV = VCC

IDRV(source)

IDRV(sink)

−

−

300

500

−

−

mA

Clamping voltage (maximum gate voltage)

VCC = VCC(ovp) – 0.2 V, DRV high,

RDRV = 33 kW, Cload = 220 pF

VDRV(clamp)

10

12

14

V

High−state voltage drop

VCC = VCC(min) + 0.2 V,

RDRV = 33 kW, DRV high

VDRV(drop)

−

−

1

V

CURRENT SENSE

Input Pull−up Current

VCS = 0.7 V

Ibias

−

1

−

mA

Maximum internal current setpoint

VFB > 3.5 V

VILIM

0.66

0.70

0.74

V

Propagation delay from VIlimit detection to

DRV off

VCS = VILIM

tdelay

−

50

70

ns

Leading Edge Blanking Duration for VILIM

tLEB

180

250

320

ns

Threshold for immediate fault protection

activation

VCS(stop)

0.95

1.05

1.15

V

Leading Edge Blanking Duration for VCS(stop)

(Note 6)

tBCS

75

120

150

ns

Soft−start duration (option A)

Soft−start duration (option B)

From 1st pulse to VCS = VILIM

tSSTART

−

3.2

10

4.0

13

4.8

ms

Frozen current setpoint (option B)

Frozen current setpoint (option D)

Frozen current setpoint (option E)

Frozen current setpoint (option H)

VI(freeze)

100

140

145

250

150

190

210

300

200

240

270

350

mV

Over voltage protection threshold when DRV

is low

VCS going up

VOVP(CS)

1.00

1.05

1.10

V

Blanking duration on OVP detection

tOVP,CS

0.7

1.0

1.3

ms

Delay time constant before OTP confirmation

tOVP,del

−

600

−

ns

INTERNAL SLOPE COMPENSATION

Slope of the compensation ramp

Scomp(65kHz)

Scomp(100kHz)

−

−

−32.5

−50

−

−

mV /

ms

FEEDBACK

Internal pull−up resistor

TJ = 25°C

RFB(up)

30

40

50

kW

VFB to internal current setpoint division ratio

(Note 6)

KFB

−

4

−

−

Internal pull−up voltage on the FB pin

VFB(ref)

4.5

5

5.5

V

Offset between FB pin and internal FB

divider

TJ = 25°C

VFB(off)

−

0.8

−

V

SKIP CYCLE MODE

Feedback voltage thresholds for skip mode

VFB going down, TJ = 25°C

VFB going up, TJ = 25°C

Vskip(in)

Vskip(out)

0.9

1.05

1.0

1.15

1.1

1.25

V

Minimum number of pulses in burst

nP,skip

3

−

−

Skip out delay

tskip

−

−

38

ms

6. Guaranteed by design.

7. CS pin source current is a sum of Ibias and IOPC, thus at VHV = 125 V is observed the Ibias only, because IOPC is switched off.