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ICS951413 Datenblatt(PDF) 9 Page - Integrated Circuit Systems

Teilenummer ICS951413
Bauteilbeschribung  Programmable System Clock Chip for ATI RS400 P4-based Systems
PDF  23 Pages
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Hersteller  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
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9
Integrated
Circuit
Systems, Inc.
ICS951413
0929C—03/07/05
SMBus Table: Frequency Select Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
FS Source
Latched Input or SMBus
Frequency Select
RW
Latched
Inputs
SMBus
0
Bit 6
CPU FS3
(SS_EN)
CPU Freq Select Bit3
(Spread Enable)
RW
OFF
ON
0
Bit 5
Reserved
Reserved
RW
Reserved
Reserved
X
Bit 4
CK410#
CPU Freq Select Bit 4
RW
Latched
Bit 3
Reserved
Reserved
RW
0
Bit 2
CPU FS_C
CPU Freq Select Bit 2
RW
Latched
Bit 1
CPU FS_B
CPU Freq Select Bit 1
RW
Latched
Bit 0
CPU FS_A
CPU Freq Select Bit 0
RW
Latched
NOTE: Byte 5 Bit 4 must also set to "1" in order to enable spread for SRC and ATIG clocks
SMBus Table: Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
PCICLK0
Output Enable
RW
Disable
Enable
1
Bit 6
CPUCLK2
Output Enable
RW
Disable
Enable
1
Bit 5
USB_48MHz
Output Enable
RW
Disable
Enable
1
Bit 4
REF0
Output Enable
RW
Disable
Enable
1
Bit 3
REF1
Output Enable
RW
Disable
Enable
1
Bit 2
REF2
Output Enable
RW
Disable
Enable
1
Bit 1
CPUCLK0
Output Enable
RW
Disable
Enable
1
Bit 0
CPUCLK1
Output Enable
RW
Disable
Enable
1
SMBus Table: CLKREQB# Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
REQBSRC7
CLKREQB# Controls
SRC7
RW
Does not
control
Controls
0
Bit 6
REQBSRC6
CLKREQB# Controls
SRC6
RW
Does not
control
Controls
0
Bit 5
REQBSRC5
CLKREQB# Controls
SRC5
RW
Does not
control
Controls
0
Bit 4
REQBSRC4
CLKREQB# Controls
SRC4
RW
Does not
control
Controls
0
Bit 3
REQBSRC3
CLKREQB# Controls
SRC3
RW
Does not
control
Controls
0
Bit 2
CPU0_Stop_En
0 = CPU is free-run
1 = CPU is stopped by
CPU_STOP#
RW
Free-Run
Stoppable
1
Bit 1
Reserved
RW
Reserved
Reserved
X
Bit 0
REQBSRC0
CLKREQB# Controls
SRC0
RW
Does not
control
Controls
0
NOTE: CPU0_Stop_En (Byte2, bit 2) only exists in devices with REV ID = 2 or higher
Byte 0
-
-
-
-
See Table 1: CPU
Frequency Selection
Table
-
-
-
-
Byte 1
50
41,40
4
54
53
52
47,46
43,42
Byte 2
12,13
16,17
18,19
22,23
24,25
47,46
-
34,33



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