STLC2500ATR datasheet(21/37 Pages) STMICROELECTRONICS

21 / 37 page

STLC2500A

General specification

21/37

6.2

Transmitter

All output power specifications are given at the pin level and over temperature range unless

otherwise specified.

6.3

System clock

The STLC2500A works with a single clock (sine wave or digital) provided on the

RF_CLK_IN pin. Precision of this clock should be 20 ppm. The external STLC2500A clock

could be 13 or 26 MHz (for GSM application), 19.2 MHz and 38.4 MHz (for 2.5 & 3G &

CDMA platforms).

6.4

Low power clock

The low power clock is used by the Bluetooth Controller as reference clock during the low

power modes. It requires an accuracy of 250ppm. The external STLC2500A clock, provided

on the LP_CLK digital pin could be 3.2 kHz, 16.384 kHz, 32 kHz and 32.768 kHz.

Tamb = 25°C, VDD_HV = 2.75V, parameters are given at device pin.

Table 16.

Transmitter parameters(1)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

RFout

Output frequency range

2402

2480

MHz

TXpout

Nominal Output power

@2402-2480 MHz

dBm

In-band spurious emission

FCC

FCC’s 20 dB BW

932

kHz

TX_SE2

Channel offset=2

-51

dBm

TX_SE3

Channel offset=3

-55

dBm

TX_SE4

Channel offset

≥4 (except

13)

-57

dBm

Initial carrier frequency tolerance (for an exact reference)

∆F

|f_TX-f0|

-75

kHz

Carrier Frequency Drift

∆f_p1|

One slot packet

kHz

∆f_p3|

Three slots packet

kHz

∆f_p5|

Five slots packet

kHz

Carrier Frequency Drift rate

∆f/50us|

Frequency drift rate

kHz/µs

Tamb = 25°C, VDD_HV = 2.75V, parameters are given at device pin.

STLC2500ATR Datenblatt(PDF) 21 Page - STMicroelectronics

STLC2500ATR Datenblatt(HTML) 21 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

Datenblatt Download

Link URL