DRA821U2...ALM datasheet(132/252 Pages) TI

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SYSCLKOUT0

OBSCLK0

CLKOUT0

CLK4

CLK5

CLK6

CLK7

CLK8

CLK9

CLK10

CLK11

CLK12

MCU_SYSCLKOUT0

CLK13

CLK14

CLK15

MCU_OBSCLK0

CLK16

CLK17

CLK18

Figure 7-22. Clock Switching Characteristics

7.9.4 Clock Specifications

7.9.4.1 Input Clocks / Oscillators

Various external clock inputs/outputs are needed to drive the device. Summary of these input clock signals is as

follows:

• OSC1_XO/OSC1_XI — Еxternal main crystal interface pins connected to internal oscillator which sources

reference clock and provides reference clock to PLLs within MAIN domain. Also, for audio applications,

high-frequency oscillator 0 is used to provide audio clock frequencies to MCASPs.

• High frequency oscillators inputs

– OSC1_XO/OSC1_XI — external main crystal interface pins connected to internal oscillator which sources

reference clock. Provides reference clock to PLLs within MAIN domain. This highfrequency oscillator is

used to provide audio clock frequencies to MCASPs.

– WKUP_OSC0_XO/WKUP_OSC0_XI — external main crystal interface pins of the internal oscillator which

sources a reference clock. Provides reference clock to PLLs within WKUP/MCU and MAIN domain.

• Low frequency oscillator input

– WKUP_LF_CLKIN — External 32.768 kHz clock input.

• General purpose clock inputs

– MCU_EXT_REFCLK0 — optional external. Provides system clock input (MCU domain).

– EXT_REFCLK1 — optional external system clock input (MAIN domain). Optionally PLL2 (PER1) and

MCASP can be sourced by EXT_REFCLK1 (sourced externally).

– SERDES0_REFCLK_P/N — SerDes reference clock input for PCIe or Optional USB3 and SGMII

interfaces.

• External CPTS reference clock inputs

– MCU_CPTS0_RFT_CLK — CPTS reference clock inputs for MCU_CPTS_RFT_CLK.

– CPTS0_RFT_CLK — CPTS reference clock inputs for CPTS_RFT_CLK.

• External audio reference clock input/output pins

– AUDIO_EXT_REFCLK0

– AUDIO_EXT_REFCLK1

DRA821U-Q1

SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022

www.ti.com

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