DRA821U2...ALM datasheet(133/252 Pages) TI

133 / 252 page

Figure 7-23 shows the external input clock sources and the output clocks to peripherals.

DEVICE

MCU_SYSCLKOUT0

Selects Main PLL output divide-by-6

External main crystal interface pins connected to internal oscillator

which provides reference clock to PLLs within MCU domain

and MAIN domain.

Optional pins to provide reference clock input to the PLLs.

OSC1_XI

OSC1_XO

SYSCLKOUT0

J7ES_CLOCK_01

External Low frequency interface pin connected to internal oscillator

which provides a 32.768 KHz clock for low power operation

in deeper sleep modes.

WKUP_LFOSC0_XI

External Wake-up crystal interface pins connected to internal oscillator

which provides reference clock to PLLs within MAIN domain, and

audio clock frequencies to MCASPs.

WKUP_OSC0_XI

WKUP_OSC0_XO

TCK

MCU_EXT_REFCLK0 / EXT_REFCLK1

Optional external System clock inputs - (MCU domain) / (MAIN domain)

JTAG Clock Input

MCU_CLKOUT0

CLKOUT

CPTS reference clock input for CPTS_RFT_CLK / MCU_CPTS_RFT_CLK

MCU_CPTS0_RFT_CLK / CPTS0_RFT_CLK

MCU_PORz / PORz

MCU_RESETz/ RESET_REQz

MCU Warm Reset Input / Device Warm Reset Input

BOOTMODE[07:00]

MCU Power ON Reset / Device Power ON Reset

Boot Mode Configuration / devices select

MCU_BOOTMODE[09:00]

MCU Boot Mode system clock speed and fail-safe boot device

DDR0_CKP / DDR0_CKN

DDR Differential Clock outputs

SERDES0_REFCLK_P/N

SerDes reference clock input for PCIe or Optional USB3 and SGMII interfaces

MCU_OBSCLK0 / OBSCLK[2:0]

Observation clock outputs for MCU Domain clock / MAIN Domain clocks

External audio reference clock input/output pins

AUDIO_EXT_REFCLK[1:0]

Reference clock output for Ethernet PHYs (50MHz or 25MHz)

Reference clock output

Figure 7-23. Input Clocks Interface

For more information about Input clock interfaces, see Clocking section in Device Configuration chapter in the

device TRM.

7.9.4.1.1 WKUP_OSC0 Internal Oscillator Clock Source

Figure 7-24 shows the recommended crystal circuit. All discrete components used to implement the oscillator

circuit should be placed as close as possible to the WKUP_OSC0_XI and WKUP_OSC0_XO pins.

www.ti.com

DRA821U-Q1

SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022

Submit Document Feedback

133

Product Folder Links: DRA821U-Q1

DRA821U2...ALM Datenblatt(PDF) 133 Page - Texas Instruments

DRA821U2...ALM Datenblatt(HTML) 133 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL