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KSZ9567RTXI-TR Datenblatt(PDF) 141 Page - Microchip Technology |
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KSZ9567RTXI-TR Datenblatt(HTML) 141 Page - Microchip Technology |
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141 / 232 page ![]() 2017-2019 Microchip Technology Inc. DS00002329D-page 141 KSZ9567R 5.2.2.3 PHY ID High Register PHY register 0x02. 5.2.2.4 PHY ID Low Register PHY register 0x03. 3 Auto-Negotiation Ability 1 = PHY is able to perform auto-negotiation RO 1b 2 Link Status 1 = Link is up 0 = Link is down RO LL - 1 Jabber Detect 1 = Jabber condition detected 0 = No jabber condition detected RO LH - 0 Extended Capability 1 = Supports extended capabilities register 0 = Basic register set capabilities only RO 1b Address: 0xN104 - 0xN105 Port N: 1-5 Size: 16 bits Bits Description Type Default 15:0 PHY Identifier High Word RO 0x0022 Address: 0xN106 - 0xN107 Port N: 1-5 Size: 16 bits Bits Description Type Default 15:0 PHY Identifier Low Word RO 0x1631 Bits Description Type Default |
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